DS26502L+ Maxim Integrated Products, DS26502L+ Datasheet - Page 47

• Manufacturer Part Number: DS26502L+
• Description: IC T1/E1/J1 64KCC ELEMENT 64LQFP
• Manufacturer: Maxim Integrated Products
• Type: BITS Elementr

Specifications of DS26502L+

• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency-max: -
• Output: -
• Input: -

Table 9-1. E1 Sync/Resync Criteria
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bits 0, 2, 3, 5, 6:Unused, must be set = 0 for proper operation.
Bit 1: Transmit HDB3 Enable (THDB3)
Bit 4: Transmit International Bit Select (TSiS)
Bit 7: Transmit Time Slot 0 Pass-Through (TFPT)
MULTIFRAME
FRAME OR
LEVEL
CRC4
CAS
0 = HDB3 disabled
1 = HDB3 enabled
0 = sample Si bits at TSER pin
1 = source Si bits from TAF and TNAF registers (in this mode, E1TCR1.7 must be set to 0)
0 = FAS bits/Sa bits/remote alarm sourced internally from the TAF and TNAF registers
1 = FAS bits/Sa bits/remote alarm sourced from TSER
FAS
TFPT
7
0
0
FAS present in frame N and
N + 2, and FAS not present in
frame N + 1
Two valid MF alignment
words found within 8ms
Valid MF alignment word
found and previous time slot
16 contains code other than
all zeros
—
E1TCR
E1 Transmit Control Register
1Eh
6
0
0
SYNC CRITERIA
—
5
0
0
TSiS
4
0
0
47 of 125
Three consecutive incorrect FAS
received
Alternate: (E1RCR.2 = 1) The above
criteria is met or three consecutive
incorrect bit 2 of non-FAS received
915 or more CRC4 code words out of
1000 received in error
Two consecutive MF alignment
words received in error
—
3
0
0
RESYNC CRITERIA
—
2
0
0
DS26502 T1/E1/J1/64KCC BITS Element
THDB3
PIN 55
HBE
1
0
—
0
0
0
4.2 and 4.3.2
ITU SPEC.
G.732 5.2
G.706
G.706
4.1.1
4.1.2