DS26502L+ Maxim Integrated Products, DS26502L+ Datasheet - Page 3

• Manufacturer Part Number: DS26502L+
• Description: IC T1/E1/J1 64KCC ELEMENT 64LQFP
• Manufacturer: Maxim Integrated Products
• Type: BITS Elementr

Specifications of DS26502L+

• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency-max: -
• Output: -
• Input: -

10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
9.2
11.1
11.2
11.3
12.1
12.2
13.1
13.2
13.3
13.4
13.5
13.6
13.7
13.8
15.1
15.2
16.1
16.2
17.1
17.2
18.1
20.1
20.2
20.3
13.2.1
13.2.2
13.2.3
13.3.1
13.3.2
13.3.3
13.3.4
17.2.1
17.2.2
17.2.3
18.1.1
18.1.2
I/O PIN CONFIGURATION OPTIONS ............................................................................52
T1 SYNCHRONIZATION STATUS MESSAGE ..............................................................55
E1 SYNCHRONIZATION STATUS MESSAGE ..............................................................64
LINE INTERFACE UNIT (LIU) ........................................................................................77
LOOPBACK CONFIGURATION.....................................................................................95
64KHZ SYNCHRONIZATION INTERFACE....................................................................96
6312KHZ SYNCHRONIZATION INTERFACE................................................................98
JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT ...................99
FUNCTIONAL TIMING DIAGRAMS .............................................................................107
OPERATING PARAMETERS .......................................................................................110
AC TIMING PARAMETERS AND DIAGRAMS ............................................................112
E1 I
P
T1 B
T
R
S
A
LIU O
LIU R
LIU T
MCLK P
J
CMI (C
LIU C
R
R
T
R
T
I
T
M
N
S
NSTRUCTION
ITTER
ROCESSOR
RANSMIT
RANSMIT
RANSMIT
EST
A
LTERNATE
ERIAL
ECEIVE
ECOMMENDED
ECEIVE
ECEIVE
ONMULTIPLEXED
ULTIPLEXED
Receive Level Indicator........................................................................................................................ 78
Receive G.703 Section 13 Synchronization Signal ............................................................................. 79
Monitor Mode ....................................................................................................................................... 79
Transmit Short-Circuit Detector/Limiter................................................................................................ 80
Transmit Open-Circuit Detector ........................................................................................................... 80
Transmit BPV Error Insertion ............................................................................................................... 80
Transmit G.703 Section 10 Synchronization Signal (E1 Mode)........................................................... 80
Boundary Scan Register .................................................................................................................... 104
Bypass Register ................................................................................................................................. 104
Identification Register......................................................................................................................... 104
Parallel Port Mode.............................................................................................................................. 107
SPI Serial Port Mode.......................................................................................................................... 107
/S
NFORMATION
IT
I
RANSMITTER
R
ECEIVER
ONTROL
B
PERATION
-O
A
ODE
EGISTERS
IT
B
RE
TTENUATOR
RIENTED
BOC ...........................................................................................................................56
64
6312
US
A
BOC .........................................................................................................................55
64
6312
-S
CCESS
K
S
M
.............................................................................................................................118
I
H
K
NTERFACE
A
CALER
R
ARK
B
K
R
H
Z
/S
...........................................................................................................................78
EGISTER
H
US
K
.........................................................................................................................78
Z
EGISTERS
C
S
H
R
I
Z
.....................................................................................................................104
IRCUITS
S
YNCHRONIZATION
C
B
B
I
B
.....................................................................................................................79
Z
...................................................................................................................112
EGISTERS
NVERSION
S
YNCHRONIZATION
IT
ODE
US
ASED ON
S
..................................................................................................................80
..................................................................................................................80
YNCHRONIZATION
A
YNCHRONIZATION
.............................................................................................................115
CCESS
...........................................................................................................103
...........................................................................................................107
(BOC) C
..........................................................................................................82
..........................................................................................................90
......................................................................................................48
) O
CRC4 M
B
ASED ON
PTION
ONTROLLER
I
NTERFACE
I
NTERFACE
ULTIFRAME
.......................................................................................81
I
NTERFACE
I
3 of 125
NTERFACE
D
OUBLE
............................................................................55
O
O
PERATION
......................................................................64
-F
O
PERATION
O
RAME
PERATION
PERATION
.........................................................74
.......................................................96
.....................................................97
...................................................98
.................................................98