DS26502L+ Maxim Integrated Products, DS26502L+ Datasheet - Page 88

IC T1/E1/J1 64KCC ELEMENT 64LQFP

DS26502L+

Manufacturer Part Number
DS26502L+
Description
IC T1/E1/J1 64KCC ELEMENT 64LQFP
Manufacturer
Maxim Integrated Products
Type
BITS Elementr
Datasheet

Specifications of DS26502L+

Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency-max
-
Output
-
Input
-
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bits 0, 3, 5 to 7: Unused, must be set = 0 for proper operation.
Bit 1: Transmit Open Circuit Detect Condition (TOCD). Set when the device detects that the TTIP and TRING outputs are
open-circuited. Note: This function not supported in transmit 6312kHz mode and is not guaranteed by production testing.
Bit 2: Transmit Current Limit Exceeded Condition (TCLE). Set when the current limiter is activated whether the current
limiter is enabled or not. This is set at approximately 50mA (RMS) on the network side of the transformer in E1 operating
modes and 70mA (RMS) on the network side of the transformer in T1 operating modes. These values are approximate and are
not guaranteed by production testing. Note: This function not supported in transmit CMI, 64kHz or 6312kHz mode.
Bit 4: Jitter Attenuator Limit Trip Event (JALT). Set when the jitter attenuator FIFO reaches to within 4 bits of its useful
limit. Will be cleared when read. Useful for debugging jitter-attenuation operation. Note: The jitter attenuator is only available
in T1 and E1 modes.
X
7
0
SR1
Status Register 1
14h
X
6
0
X
5
0
JALT
X
4
0
88 of 125
X
3
0
TCLE
X
2
0
TOCD
X
1
0
X
0
0

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