PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 140

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Application examples:
FC2
0
0
0
0
1
1
1
1
For further details on the framing output control please refer to chapter 5.2.2.3.
COC
Note: Applies only if CMD1:CSS = 0.
CXF
CRR
Note: CRR must be set to 0 in CFI-mode 3.
CBN9..8
Semiconductor Group
If EMOD:ECMD2 is set to ’0’ then CMD2:COC must be set to ’0’ (see chapter 4.5).
CFI-Output Clock rate.
0…the frequency of DCL is identical to the CFI-data rate (all CFI-modes),
1…the frequency of DCL is twice the CFI-data rate (CFI-modes 0 and 3 only!)
CFI-Transmit on Falling edge.
0…the data is transmitted with the rising CRCL edge,
1…the data is transmitted with the falling CRCL edge.
CFI-Receive on Rising edge.
0…the data is received with the falling CRCL edge,
1…the data is received with the rising CRCL edge.
CFI-Bit Number 9..8
these bits, together with the CBNR:CBN7..0, hold the number of bits per
CFI-frame.
FC1
0
0
1
1
0
0
1
1
FC0
0
1
0
1
0
1
0
1
FC-Mode Main Applications
0
1
2
3
4
5
6
7
140
IOM-1 multiplexed (burst) mode
general purpose
general purpose
general purpose
2 ISAC-S per SLD-port
reserved
IOM-2 or SLD-modes
software timed multiplexed applications
Detailed Register Description
PEB 20550
PEF 20550
01.96