PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 213

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

5.2.2.3 CFI Characteristics
In the following the configurable interface characteristics that can be programmed in the
CFI registers are explained in more detail.
CFI Mode CMD1:CMD1, CMD0
The CFI mode primarily defines the actual number of CFI ports that can be used for
switching purposes (logical ports). 1, 2 or 4 duplex or 8 bidirectional logical CFI ports can
be selected. Since the channel capacity of the ELIC is constant (128 channels/direction),
the CFI mode also influences the maximum possible data rate.
In each CFI mode a reference clock (RCL) of a specific frequency is required. This clock
may be derived from the PCM clock signal PDC (CMD1:CSS = 0) or from the DCL signal
(CMD1:CSS = 1). Also refer to figure 66 and figure 67.
Table 31 states the specific characteristics of each CFI mode.
(DR = CFI data rate, N = number of 8 bit timeslots in PCM frame, du = duplex port,
bi = bidirectional port).
Table 31
Modes at the Configurable Interface
Note: The label is used to specify a CFI port when programming a switching function. It
Semiconductor Group
CMD1 CMD0 CFI
1
0
0
1
should not be confused with the physical port number which refers to actual
hardware pins. The relationship between logical and physical port numbers is
given in table 35 and is illustrated in figure 82.
1
0
1
0
Mode
3
0
1
2
Number
(Label) of
Logical
Ports
8 bi (0 … 7)
4 du (0 … 3)
2 du (0 … 1)
1 du
128
128
128
128
min. max.
CFI Data
[kBit/s]
Rate
1024
2048
4096
8192
213
Min. Required
CFI DR
[kBit/s]
relative to
PCM Data
Rate
16N/3
32N/3
64N/3
64N/3
Necessary
Reference
Clock
(RCL)
4 DR
2 DR
DR
0.5 DR
Application Hints
DCL Output
Frequencies
CMD1:
CSS = 0
DR, 2 DR
DR, 2 DR
DR
DR
PEB 20550
PEF 20550
01.96