PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 403

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PEF20550HV21XT

Manufacturer Part Number
PEF20550HV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF20550HV21XT

Lead Free Status / Rohs Status
Supplier Unconfirmed
Figure 148
Preparing EPIC
9.2.4
Semiconductor Group
MAAR
MAAR
MAAR
MAAR
Initialization of the C/I Channels Data Downstream:
Initialization of the C/I Channels Data Upstream:
Preparing EPIC
IOM -2 Channel
IOM -2 Channel
IOM -2 Channel
IOM -2 Channel
0 .
0
1
1 .
R
R
R
R
IOM -2
.
.
.
.
.
.
R
®
. 1 .
.
.
. 1 .
s C/I Channels (working sheet)
ELIC,
CFI Mode 0
1
1
Port
Port
Port
Port
.
.
C/I-FIFO
R
EPIC
. 0
.
.
. 1
0
1
®
R
s C/I Channels
MADR
MADR
MADR
MADR
MADR
Pointer
Expected C/I-Value
C/I Idle Code
PCM Port, TS
Only for central
D Channel Handling !
C/I Idle Code
PCM Port, TS
Only for central
D Channel Handling !
Expectend C/I Value
Only analog
6 Bit C/I Handling !
1 1
0 .
1
.
.
.
6 Bit C/I
.
.
.
.
CM Data
.
.
.
.
.
4 Bit C/I
D
.
.
.
.
.
C/I
.
.
.
.
.
.
.
. 1 1
.
. 1 1
403
1
.
.
Data Memory
1
.
.
MACR
MACR
MACR
MACR
Mode Selection
Mode Selection
Mode Selection
Mode Selection
0 1 1 1 .
0
0
0 1 1 1 .
1
1
1
1
PCM TS
1
1
0 1 X X =
0 0 0 0 =
0
0 0 0 0 =
1 0 0 0 = Decentral
1
1
1
1
1 0 1 1 = Analog C/I
1
1
1 0 0 0 =
1 0 1 0 =
1 0 0 0 = ELIC SACCO-A
1
.
.
0
0
0
0
0
0
1
0
.
.
.
.
X
1
1
1
1
1 1 = PCM TS Bit 7, 6
1 0 =
0
0 0 =
1
0
1
1
0 1 =
0
1
.
.
.
.
X
0
0
0
1
1
1
0
1
0
0
0
.
.
.
.
=
=
=
=
=
=
=
=
=
=
=
=
D Channel Handling
Central
D Channel Handling
ELIC SACCO-A
D Channel Handling
Decentral
D Channel Handling
Central
D Channel Handling
PCM TS Bit 5, 4
PCM TS Bit 3, 2
PCM TS Bit 1, 0
ELIC SACCO-A
Decentral
D Channel Handling
Central
D Channel Handling
6 Bit Analog C/I
D Channel Handling
Decentral
D Channel Handling
Central
D Channel Handling
PCM TS Bit 7, 6
PCM TS Bit 5, 4
PCM TS Bit 3, 2
PCM TS Bit 1, 0
Analog C/I
ELIC SACCO-A
D Channel Handling
6 Bits Analog C/I
R
R
R
R
PEB 20550
PEF 20550
ITD08112
Appendix
01.96

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