PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 44

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Power up
Watchdog timer under flow
External reset (RESEX)
Setting of bit SWRX
Table 4
Behavior of the Reset Logic in the Case of Voltage Drop
1 V
generated resets with respect to the RESIN pulse width. The activation of RESEX
causes an immediate activation of RESIN. Upon the deactivation of RESEX however,
RESIN is deactivated only with the next rising PDC-edge. A PFS-frequency of 8-kHz
results in a RESIN-period of 1 ms.
When setting bit VNSR:SWRX RESIN is also activated but the ELIC itself is not reset.
This feature supports a proper reset procedure for devices which require dedicated
clocking during reset. The sequence required is as follows:
1. Initialize EPIC-1 for a timer interrupt
2. Set bit VNSR:SWRX to "1", RESIN is activated
3. When the timer interrupt occurs, RESIN is deactivated
4. Set bit VNSR:SWRX to "0"
5. Read ISTA_E, in order to deactivate timer interrupt
Table 3
Reset Activities
When
V
Note: The power-up reset generator must not be used as a supply voltage control
Semiconductor Group
DD
3 V
1 V
V
element.
V
DD
DD
drops under normal operation the reset logic has the following behavior:
3 V
X
–
Internal ELIC
Reset
–
X
Behavior
No internal reset, no RESIN
Internal reset and RESIN after
Not defined
44
RESIN
Activation
X
X
X
X
Functional Description
V
DD
goes up again
RESIN Pulse
Width
8 PFS
8 PFS
RESEX
Programmable
PEB 20550
PEF 20550
01.96