PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 81

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

2.2.8
The D-channel arbiter facilitates the simultaneous serving of multiple D-channels with
one HDLC-controller (SACCO-A) allowing a full duplex signaling protocol (e.g. LAPD).
It builds the interface between the serial input/output of SACCO-channel A and the time
slot oriented D-channels on the EPIC-1 IOM-2 interface.
The SACCO-operation mode "transparent mode 0" has to be selected when using the
arbiter.
It is only possible to operate the D-channel arbiter with framing control modes 3, 6 and 7,
(refer to register EPIC-1.CMD2:FC(2:0)).
The arbiter consists of three sub blocks:
• Arbiter state machine (ASM):
• Control channel master (CCM):
• Transmit channel selector (TCHS): selects one or a group of subscribers for
Figure 43
D-Channel Arbiter
Semiconductor Group
Down
Stream
Up
Stream
D-Channel Arbiter
IOM -2 Channels
Port 0
Port 1
Port 2
Port 3
Port 0
Port 1
Port 2
Port 3
Ch0 Ch1 Ch2 Ch3 Ch4 Ch5 Ch6 Ch7
R
Control
Data
selects one subscriber for upstream D-channel
assignment
issues the "D-channel available" information from
the arbiter in the control channel
D-channel assignment
81
Mux
Mux
Machine
Arbiter
State
ASM
Data OUT
Serial
SACCO-A
Channel
Transmit
D-Channel Arbiter
Transmit
Strobe
Control
Channel
Master
CCM
Functional Description
Receive
Strobe
Receive
SACCO-A
Channel
Channel
Selector
Transmit
TCHS
PEB 20550
PEF 20550
Serial
Data IN
ITS05840
01.96