PEB20570FV3.1T Infineon Technologies, PEB20570FV3.1T Datasheet - Page 288

• Manufacturer Part Number: PEB20570FV3.1T
• Manufacturer: Infineon Technologies

Specifications of PEB20570FV3.1T

• Lead Free Status / Rohs Status: Not Compliant

3)
4)
Figure 81
Data Sheet
DCL_2000
DX
DR
CMD
STAT
FSC
FSC Control Register : EFSCD (bit 2) = ‘1’, i.e. FSC rising edge is delayed in one cycle of 61.44 MHz (16 ns)
after DCL_2000 rising edge. Special mode designed for working with the VIP.
Page 239
When a short-pulse FSC cycle is issued, FSC high period is one DCL (of IOM-2) cycle long. In the worst case,
when DCL_2000 = 3072 kHz and DCL = 4096 kHz, FSC high pulse is shorter than one cycle of DCL_2000,
but yet it is stable from the rising edge and until at least 70 ns after the falling edge of DCl_2000 within this
single cycle. Thus setup and hold times of FSC around DCL_2000’s falling edge are guaranteed.
IOM-2000 Interface Timing
t
XDR
t
t
DSF
SSF
t
CDR
ch2
ch0
Electrical Characteristics and Timing Diagrams
271
t
t
DHF
SHF
ch3
t
XDR
ch1
ch4
ch2
“FSC Control Register” on
ch5
ch3
PEB 20570
PEB 20571
2003-07-31