PEB20570FV3.1T Infineon Technologies, PEB20570FV3.1T Datasheet - Page 49

• Manufacturer Part Number: PEB20570FV3.1T
• Manufacturer: Infineon Technologies

Specifications of PEB20570FV3.1T

• Lead Free Status / Rohs Status: Not Compliant

Table 14
Pin
No.
74
82
81
75
80
Data Sheet
Symbol In (I)
RxD2 /
LCxD2/
LCTS2
TxD2 /
LCLK2
TSC2
RxD1 /
LRxD3
TxD1 /
LTxD3
PCM Interface Ports 0 ... 3 / LNC Ports 2 ... 3 (DELIC-PB) (cont’d)
Out (O)
I
I
O
I/O
O
I
I
O
O(OD)
During
Reset
I
weak
low
TEST(1)
strap
refer to
Page 38
I
High
Z
After
Reset
I
weak
low
H
I
High
Z
32
Function
PCM Receive Data Port 2
LNC2 Collision Data
2 modes per S/W selectable:
1) Collision Data (In HDLC Mode).
2) ’clear-to-send’ functionality
(Async mode)
PCM Transmit Data Port 2
LNC External Clock Port 2
When configured as output may be driven
at the following frequencies:
2.048 MHz, 4.096 MHz,
8.192 MHz, 16.384 MHz
PCM Tristate Control Port 2
Supplies a control signal for an external
driver (’low’ when the corresponding TxD-
output is valid).
PCM Receive Data Port 1
LNC Receive Serial Data Port 3
(HDLC and Async mode)
PCM Transmit Data Port 1
LNC Transmit Serial Data Port 3
(HDLC and Async mode)
Pin Description
PEB 20570
PEB 20571
2003-07-31