HYB39S256800CTL-8 Infineon Technologies, HYB39S256800CTL-8 Datasheet - Page 23

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HYB39S256800CTL-8

Manufacturer Part Number
HYB39S256800CTL-8
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of HYB39S256800CTL-8

Lead Free Status / Rohs Status
Not Compliant
3. Read Interrupted by a Read
4. Read to Write Interval
4.1 Read to Write Interval
INFINEON Technologies
(Burst Length = 4, CAS latency = 3)
CLK
DQMx
Command
DQ’s
t
t
(Burst Length = 4, CAS latency = 2, 3)
CLK
Command
CAS
latency = 2
CAS
latency = 3
CK2
CK3
, DQ’s
, DQ’s
Read A
T0
T0
NOP
"H" or "L"
Read A
Read B
T1
T1
Minimum delay between the Read and Write
Commands = 4 + 1 = 5 cycles
T2
T2
NOP
DOUT A0 DOUT B0 DOUT B1 DOUT B2
NOP
T3
T3
NOP
DOUT A0 DOUT B0
NOP
23
DOUT A0
t
T4
DQZ
T4
NOP
NOP
Must be Hi-Z before
the Write Command
T5
T5
NOP
NOP
DOUT B1
256-MBit Synchronous DRAM
HYB39S256400/800/160CT(L)
Write B
T6
DIN B0
T6
DOUT B3
DOUT B2
NOP
Write latency
T7
DIN B1
T7
NOP
DOUT B3
NOP
t
DQW
T8
DIN B2
T8
NOP
of DQMx
NOP
SPT03787
SPT03713

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