MT29C4G48MAZAPAKD-5 IT Micron Technology Inc, MT29C4G48MAZAPAKD-5 IT Datasheet - Page 145

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MT29C4G48MAZAPAKD-5 IT

Manufacturer Part Number
MT29C4G48MAZAPAKD-5 IT
Description
MICMT29C4G48MAZAPAKD-5_IT 4G+2G MCP
Manufacturer
Micron Technology Inc
Table 45: I
Notes 1–5, 7, and 12 apply to all the parameters/conditions in this table; V
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Parameter/Condition
Self refresh:
CKE = LOW;
are stable; Data bus inputs are stable
DD
t
CK =
6 Specifications and Conditions
t
CK (MIN); Address and control inputs
Notes:
10. CKE must be active (HIGH) during the entire time a REFRESH command is executed.
11. This limit is a nominal value and does not result in a fail. CKE is HIGH during REFRESH
12. Values for I
13. Typical values at 25˚C, not a maximum value.
14. Self refresh is not supported for AT (85˚C to 105˚C) operation.
1. All voltages referenced to V
2. Tests for I
3. Timing and I
4. I
5. I
6. MIN (
7. Measurement is taken 500ms after entering into this operating mode to provide settling
8. V
9. I
related specifications and device operation are guaranteed for the full voltage range
specified.
but input timing is still referenced to V
output timing reference voltage level is V
minimum cycle time with the outputs open.
aged at the defined cycle rate.
minimum absolute value for the respective parameter.
the largest multiple of
time for the tester.
From the time the AUTO REFRESH command is registered, CKE must be active at each
rising clock edge until
command period (
ues are estimated.
DD
DD
DD2N
DD
is dependent on output loading and cycle rates. Specified values are obtained with
specifications are tested after the device is properly initialized and values are aver-
must not vary more than 4% if CKE is not active while any bank is active.
t
specifies DQ, DQS, and DM to be driven to a valid high or low logic level.
RC or
DD
DD6
t
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
characteristics may be conducted at nominal supply voltage levels, but the
DD
RFC) for I
85˚C are guaranteed for the entire temperature range. All other I
tests may use a V
t
RFC (MIN)) else CKE is LOW (for example, during standby).
DD
t
t
RFC later.
CK that meets the maximum absolute value for
measurements is the smallest multiple of
145
SS
Electrical Specifications – I
Full array, 105˚C
1/16 array, 85˚C
1/16 array, 45˚C
Full array, 85˚C
Full array, 45˚C
1/2 array, 85˚C
1/2 array, 45˚C
1/4 array, 85˚C
1/4 array, 45˚C
1/8 array, 85˚C
1/8 array, 45˚C
.
IL
-to-V
Micron Technology, Inc. reserves the right to change products or specifications without notice.
IH
DDQ/2
DD
swing of up to 1.5V in the test environment,
DDQ/2
/V
DDQ
(or to the crossing point for CK/CK#). The
.
= 1.70–1.95V
Symbol
I
DD6
t
RASmax for I
© 2009 Micron Technology, Inc. All rights reserved.
Value
t
n/a
2000
1450
1230
1090
1020
CK that meets the
900
700
600
575
550
DD
DD
14
t
measurements is
Parameters
RAS.
Units
DD6
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
val-

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