EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 580
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EP2AGX95EF29I5N
Manufacturer Part Number
EP2AGX95EF29I5N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX95EF29I5N.pdf
(306 pages)
Specifications of EP2AGX95EF29I5N
Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP2AGX45CU17C6N PDF datasheet
- EP2AGX45CU17C6N PDF datasheet #2
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- EP2AGX45CU17C6N PDF datasheet #5
- EP2AGX95EF29I5N PDF datasheet #6
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4–6
Arria II Device Handbook Volume 2: Transceivers
All Supported Functional Modes Except PCIe Functional Mode
1
This section describes the reset sequences for transceiver channels in bonded and
non-bonded configurations. Timing diagrams of some typical configurations are
shown to facilitate proper reset sequence implementation. In these functional modes,
you can set the receiver CDR either in automatic lock or manual lock mode.
In manual lock mode, the receiver CDR locks to the reference clock (lock-to-reference)
or the incoming serial data (lock-to-data), depending on the logic levels of the
rx_locktorefclk and rx_locktodata signals. With the receiver CDR in manual lock
mode, you can configure the transceiver channels in the Arria II GX or GZ device
either in a non-bonded configuration or a bonded configuration. In a bonded
configuration, such as XAUI mode, four channels are bonded together.
Table 4–3
modes for the rx_locktorefclk and rx_locktodata signals.
Table 4–3. Lock-To-Reference and Lock-To-Data Modes for Arria II Devices
Bonded Channel Configuration
In a bonded channel configuration, you can reset all the bonded channels
simultaneously. Examples of bonded channel configurations are XAUI, PCIe, and
Basic ×4 functional modes. In Basic ×4 functional mode, you can bond Transmitter
Only channels together.
In XAUI mode, the receiver and transmitter channels are bonded. Each of the receiver
channels in this mode has its own output status signals, rx_pll_locked and
rx_freqlocked. The timing of these signals is considered in the reset sequence.
The following timing diagrams describe the reset and power-down sequences for
bonded configurations under the following setups:
■
■
■
Transmitter Only channel setup—applicable to Basic ×4 functional mode
Receiver and Transmitter channel setup—receiver CDR in automatic lock mode;
applicable to XAUI functional mode
Receiver and Transmitter channel setup—receiver CDR in manual lock mode;
applicable to XAUI functional mode
rx_locktorefclk
lists the lock-to-reference (LTR) and lock-to-data (LTD) controller lock
—
1
0
rx_locktodata
Chapter 4: Reset Control and Power Down in Arria II Devices
0
1
0
LTR/LTD Controller Lock Mode
December 2010 Altera Corporation
Automatic Lock Mode
Manual, LTR Mode
Manual, LTD Mode
Transceiver Reset Sequences
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