ICS1893YI-10LF IDT, Integrated Device Technology Inc, ICS1893YI-10LF Datasheet - Page 112
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ICS1893YI-10LF
Manufacturer Part Number
ICS1893YI-10LF
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Specifications of ICS1893YI-10LF
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Compliant
Other names
1893YI-10LF
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Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
ICS1893YI-10LF
Manufacturer:
IDT
Quantity:
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Manufacturer:
IDT, Integrated Device Technology Inc
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9.3.4 MAC/Repeater Interface Pins
9.3.4.1
ICS1893 Rev C 6/6/00
This section lists pin descriptions for each of the following interfaces
•
•
•
Table 9-5
Table 9-5.
COL
CRS
MDC
MAC/Repeater Interface Pins for Media Independent Interface
Name
Section 9.3.4.1, “ MAC/Repeater Interface Pins for Media Independent Interface”
Section 9.3.4.2, “ MAC/Repeater Interface Pins for 100M Symbol Interface”
Section 9.3.4.3, “ MAC/Repeater Interface Pins for 10M Serial Interface”
Pin
ICS1893 Data Sheet - Release
lists the MAC/Repeater Interface pin descriptions for the MII.
Number
MAC/Repeater Interface Pins: Media Independent Interface (MII)
Pin
49
50
31
Output
Output
Type
Input
Pin
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
Collision (Detect).
The ICS1893 asserts a signal on the COL pin when the ICS1893 detects
receive activity while transmitting (that is, while the TXEN signal is
asserted by the MAC/repeater, that is, when transmitting). When the
mode is:
Carrier Sense.
When the ICS1893 mode is:
Management Data Clock.
The ICS1893 uses the signal on the MDC pin to synchronize the transfer
of management information between the ICS1893 and the Station
Management Entity (STA), using the serial MDIO data line. The MDC
signal is sourced by the STA.
Note:
1. The signal on the COL pin is not synchronous to either RXCLK or
2. In full-duplex mode, the COL signal is disabled and always remains
3. The COL signal is asserted as part of the signal quality error (SQE)
•
•
•
•
Note: The signal on the CRS pin is not synchronous to the signal on
10Base-T, the ICS1893 detects receive activity by monitoring the
un-squelched MDI receive signal.
100Base-TX, the ICS1893 detects receive activity when there are two
non-contiguous zeros in any 10-bit symbol derived from the MDI
receive data stream.
Half-duplex, the ICS1893 asserts a signal on its CRS pin when it
detects either receive or transmit activity.
Either full-duplex or Repeater mode, the ICS1893 asserts a signal on
its CRS pin only in response to receive activity.
TXCLK.
low.
test. This assertion can be suppressed with the SQE Test Inhibit bit
(bit 18.2).
either the RXCLK or TXCLK pin.
112
Chapter 9 Pin Diagram, Listings, and Descriptions
Pin Description
June, 2000