ICS1893YI-10LF IDT, Integrated Device Technology Inc, ICS1893YI-10LF Datasheet - Page 51
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ICS1893YI-10LF
Manufacturer Part Number
ICS1893YI-10LF
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Specifications of ICS1893YI-10LF
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Compliant
Other names
1893YI-10LF
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS1893YI-10LF
Manufacturer:
IDT
Quantity:
390
Company:
Part Number:
ICS1893YI-10LF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
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ICS1893YI-10LF
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ICS1893YI-10LFT
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Quantity:
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7.5 Functional Block: 10Base-T Operations
7.5.1 10Base-T Operation: Manchester Encoder/Decoder
7.5.2 10Base-T Operation: Clock Synthesis
7.5.3 10Base-T Operation: Clock Recovery
ICS1893 Rev C 6/6/00
When configured for 10Base-T mode, the ICS1893 MAC/Repeater Interface can be configured to provide
either a 10M MII (Media Independent Interface) or a 10M Serial Interface. The Twisted-Pair Interface is
automatically configured to provide a two-level, Manchester-encoded signal at the voltage levels specified
in the ISO/IEC standard. (For more information on the Twisted-Pair Interface, see
“ Twisted-Pair Interface”
The 10Base-T and 100Base-TX operations differ as follows. 10Base-T operations are fundamentally
simpler than 100Base-TX operations. The data rate is slower, requiring less encoding than 100Base-TX
operations. In addition, the bandwidth requirements (and therefore the line attenuation issues) are not as
severe as with 100-MHz operations. Consequently, when an ICS1893 is set for 10Base-T operations, it
requires fewer internal circuits in contrast to 100Base-TX operations. (For an overview of 10Base-T
operations, see
During data transmission the ICS1893 acquires data from its MAC/Repeater Interface in either 4-bit nibbles
or as a serial bit stream. The ICS1893 converts this data into a Manchester-encoded signal for presentation
to its MDI, as required by the ISO/IEC specification.
In a Manchester-encoded signal, all logic:
•
•
During 10Base-T data reception, a Manchester Decoder translates the serial bit stream obtained from the
Twisted-Pair Receiver (MDI) into an NRZ bit stream. The Manchester Decoder then passes the data to the
MAC/Repeater Interface in either serial or parallel format, depending on the interface configuration.
Manchester-encoded signals have the following advantages:
•
•
The primary disadvantage in using Manchester-encoded signals is that it doubles the data rate, making it
operationally prohibitive for 100-MHz operations.
The ICS1893 synthesizes the clocks required for synchronizing data transmission. In 10Base-T mode, the
MAC/Repeater Interface can provide either a 10M MII (Media Independent Interface) or a 10M Serial
Interface. When the ICS1893 is configured to support a:
•
•
The ICS1893 recovers its receive clock from the Manchester-encoded data stream obtained from its
Twisted-Pair Receiver using a phase-locked loop (PLL). The ICS1893 then uses this recovered clock for
synchronizing data transmission between itself and the MAC/repeater. Receive-clock PLL acquisitions begin
with reception of the MAC Frame Preamble and continue as long as the ICS1893 is receiving data.
Ones are:
Zeros are:
Every bit period has an encoded clock.
The split-phase nature of the signal always provides a zero DC level regardless of the data (that is, there
is no baseline wander phenomenon).
10M MII interface, the ICS1893 synthesizes a 2.5-MHz clock for nibble-wide transactions
10M Serial Interface to the MAC/repeater, the ICS1893 synthesizes a 10-MHz clock
– Positive during the first half of the bit period
– Negative during the second half of the bit period
– Negative during the first half of the bit period
– Positive during the second half of the bit period
ICS1893 - Release
Section 5.6, “ 10Base-T Operations”
.)
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
51
.).
Chapter 7 Functional Blocks
Section 6.5,
June, 2000