PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 207

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PIC24EP64MC204-E/PT

Manufacturer Part Number
PIC24EP64MC204-E/PT
Description
16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
Manufacturer
Microchip Technology
Datasheet

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13.0
The Timer2/3 and Timer4/5 modules are 32-bit timers,
which can also be configured as four independent
16-bit timers with selectable operating modes.
As a 32-bit timer, Timer2/3 and Timer4/5 operate in
three modes:
• Two Independent 16-bit Timers (e.g., Timer2 and
• Single 32-bit Timer
• Single 32-bit Synchronous Counter
They also support these features:
• Timer Gate Operation
• Selectable Prescaler Settings
• Timer Operation during Idle and Sleep modes
• Interrupt on a 32-bit Period Register Match
• Time Base for Input Capture and Output Compare
• ADC1 Event Trigger (Timer2/3 only)
 2011-2012 Microchip Technology Inc.
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
Modules (Timer2 and Timer3 only)
Note 1: This data sheet summarizes the features
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
2: Some registers and associated bits
TIMER2/3 AND TIMER4/5
of
dsPIC33EPXXXMC20X/50X,
PIC24EPXXXGP/MC20X
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 11. “Timers”
(DS70362) of the “dsPIC33E/PIC24E
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
the
dsPIC33EPXXXGP50X,
family
and
of
in
Individually, all four of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the event trigger; this
is implemented only with Timer2/3. The operating
modes and enabled features are determined by setting
the appropriate bit(s) in the T2CON, T3CON, and
T4CON, T5CON registers. T2CON and T4CON are
shown in generic form in
T5CON are shown in
For 32-bit timer/counter operation, Timer2 and Timer4
are the least significant word (lsw); Timer3 and Timer5
are the most significant word (msw) of the 32-bit timers.
A block diagram for an example 32-bit timer pair
(Timer2/3 and Timer4/5) is shown in
Note:
Note:
For 32-bit operation, T3CON and T5CON
control bits are ignored. Only T2CON and
T4CON control bits are used for setup and
control. Timer2 and Timer4 clock and gate
inputs are utilized for the 32-bit timer mod-
ules, but an interrupt is generated with the
Timer3 and Timer5 interrupt flags.
Only Timer2, 3, 4 and 5 can trigger a DMA
data transfer.
Register
Register
13-2.
DS70657F-page 207
13-1. T3CON and
Figure
13-3.

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