PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 223

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PIC24EP64MC204-E/PT

Manufacturer Part Number
PIC24EP64MC204-E/PT
Description
16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
Manufacturer
Microchip Technology
Datasheet

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Part Number:
PIC24EP64MC204-E/PT
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REGISTER 15-2:
 2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-9
bit 8
bit 7
bit 6
bit 5
Note 1:
OCTRIG
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
FLTMD
R/W-0
R/W-0
2:
3:
Do not use the OCx module as its own synchronization or trigger source.
When the OCy module is turned OFF, it sends a trigger out signal. If the OCx module use the OCy module
as a trigger source, the OCy module must be unselected as a trigger source prior to disabling it.
Each Output Compare module (OCx) has one PTG Trigger/Synchronization source. See
“Peripheral Trigger Generator (PTG) Module”
PTGO0 = OC1
PTGO1 = OC2
PTGO2 = OC3
PTGO3 = OC4
FLTMD: Fault Mode Select bit
1 = Fault mode is maintained until the Fault source is removed; the corresponding OCFLTx bit is
0 = Fault mode is maintained until the Fault source is removed and a new PWM period starts
FLTOUT: Fault Out bit
1 = PWM output is driven high on a Fault
0 = PWM output is driven low on a Fault
FLTTRIEN: Fault Output State Select bit
1 = OCx pin is tri-stated on Fault condition
0 = OCx pin I/O state defined by FLTOUT bit on Fault condition
OCINV: OCMP Invert bit
1 = OCx output is inverted
0 = OCx output is not inverted
Unimplemented: Read as ‘0’
OC32: Cascade Two OCx Modules Enable bit (32-bit operation)
1 = Cascade module operation enabled
0 = Cascade module operation disabled
OCTRIG: OCx Trigger/Sync Select bit
1 = Trigger OCx from source designated by SYNCSELx bits
0 = Synchronize OCx with source designated by SYNCSELx bits
TRIGSTAT: Timer Trigger Status bit
1 = Timer source has been triggered and is running
0 = Timer source has not been triggered and is being held clear
OCTRIS: OCx Output Pin Direction Select bit
1 = OCx is tri-stated
0 = Output compare module drives the OCx pin
TRIGSTAT
R/W-0 HS
FLTOUT
R/W-0
cleared in software and a new PWM period starts
OCxCON2: OUTPUT COMPARE x CONTROL REGISTER 2
HS = Hardware Settable bit
W = Writable bit
‘1’ = Bit is set
FLTTRIEN
OCTRIS
R/W-0
R/W-0
OCINV
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
for more information.
R/W-1
U-0
SYNCSEL<4:0>
R/W-1
U-0
x = Bit is unknown
R/W-0
U-0
DS70657F-page 223
Section 24.0
R/W-0
R/W-0
OC32
bit 8
bit 0

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