PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 324

• Manufacturer Part Number: PIC24EP64MC204-E/PT
• Description: 16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
• Manufacturer: Microchip Technology

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
REGISTER 23-1:
DS70657F-page 324
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
2:
3:
See
This setting is available in dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices only.
Do not clear the DONE bit in software if Auto-Sample is enabled (ASAM = 1).
Section 24.0 “Peripheral Trigger Generator (PTG) Module”
SSRC<2:0>: Sample Clock Source Select bits
If SSRCG = 1:
111 = Reserved
110 = PTGO15 primary trigger compare ends sampling and starts conversion
101 = PTGO14 primary trigger compare ends sampling and starts conversion
100 = PTGO13 primary trigger compare ends sampling and starts conversion
011 = PTGO12 primary trigger compare ends sampling and starts conversion
010 = PWM Generator 3 primary trigger compare ends sampling and starts conversion
001 = PWM Generator 2 primary trigger compare ends sampling and starts conversion
000 = PWM Generator 1 primary trigger compare ends sampling and starts conversion
If SSRCG = 0:
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = CTMU ends sampling and starts conversion
101 = Reserved
100 = Timer5 compare ends sampling and starts conversion
011 = PWM primary Special Event Trigger ends sampling and starts conversion
010 = Timer3 compare ends sampling and starts conversion
001 = Active transition on the INT0 pin ends sampling and starts conversion
000 = Clearing the Sample bit (SAMP) ends sampling and starts conversion (Manual mode)
SSRCG: Sample Clock Source Group bit
See SSRC<2:0> for details.
SIMSAM: Simultaneous Sample Select bit (only applicable when CHPS<1:0> = 01 or 1x)
In 12-bit mode, (AD21B = 1), SIMSAM is unimplemented and is read as ‘0’
1 = Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> = 1x); or
0 = Samples multiple channels individually in sequence
ASAM: ADC Sample Auto-Start bit
1 = Sampling begins immediately after last conversion. SAMP bit is auto-set.
0 = Sampling begins when SAMP bit is set
SAMP: ADC Sample Enable bit
1 = ADC Sample and Hold amplifiers are sampling
0 = ADC Sample and Hold amplifiers are holding
If ASAM = 0, software can write ‘1’ to begin sampling. Automatically set by hardware if ASAM = 1.
If SSRC = 000, software can write ‘0’ to end sampling and start conversion. If SSRC 000,
automatically cleared by hardware to end sampling and start conversion.
DONE: ADC Conversion Status bit
1 = ADC conversion cycle is completed.
0 = ADC conversion not started or in progress
Automatically set by hardware when A/D conversion is complete. Software can write ‘0’ to clear DONE
status (software not allowed to write ‘1’). Clearing this bit does NOT affect any operation in progress.
Automatically cleared by hardware at start of a new conversion.
Samples CH0 and CH1 simultaneously (when CHPS<1:0> = 01)
AD1CON1: ADC1 CONTROL REGISTER 1 (CONTINUED)
(3)
for information on this selection.
 2011-2012 Microchip Technology Inc.
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