DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 157

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Transmit Byte Count (TBC[0:7]) – Eight bits of 32 bit value. Register description below.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Transmit Byte Count (TBC[15:8]) - Eight bits of 32 bit value. Register description below.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Transmit Byte Count (TBC[23:16]) - Eight bits of 32 bit value. Register description below.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Transmit Byte Count (TBC[31:24]) – These thirty-two bits indicate the number of packet bytes
inserted in the outgoing data stream.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: Transmit Manual Error Insertion (TMEI) A zero to one transition will insert a single error in the Transmit
direction.
TBC15
TBC23
TBC31
TBC7
7
0
7
0
7
0
7
0
7
0
-
TBC14
TBC22
TBC30
TBC6
6
0
6
0
6
0
6
0
6
0
-
LI.TBCR0
Transmit Byte Count Byte 0
0D0h
LI.TBCR1
Transmit Byte Count Byte 1
0D1h
LI.TBCR2
Transmit Byte Count Byte 2
0D2h
LI.TBCR3
Transmit Byte Count Byte 3
0D3h
LI.TMEI
Transmit Manual Error Insertion
0D4h
TBC13
TBC21
TBC29
TBC5
5
0
5
0
5
0
5
0
5
0
-
TBC12
TBC20
TBC28
157 of 344
TBC4
0
0
0
0
0
4
4
4
4
4
-
TBC11
TBC19
TBC27
TBC3
3
0
3
0
3
0
3
0
3
0
-
TBC10
TBC18
TBC26
TBC2
2
0
2
0
2
0
2
0
2
0
-
TBC17
TBC25
TBC1
TBC9
1
0
1
0
1
0
1
0
1
0
-
TBC16
TBC24
TBC0
TBC8
TMEI
0
0
0
0
0
0
0
0
0
0

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