DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 174

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
11.6 Ethernet Interface Registers
The Ethernet Interface registers are used to configure RMII/MII bus operation and establish the MAC parameters
as required by the user. The MAC Registers cannot be addressed directly from the Processor port. The registers
below are used to perform indirect read or write operations to the MAC registers. The MAC Status Registers are
shown in
11.6.1 Ethernet Interface Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: MAC Read Address (MACRA0-7) Low byte of the MAC indirect register address. Used only for read
operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: MAC Read Address (MACRA8-15) High byte of the MAC indirect register address. Used only for read
operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: MAC Read Data 0 (MACRD0-7) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Table
MACRD7
MACRA7
MACRA1
11-7. Accessing the MAC Registers is described in the Section 9.15.
7
0
7
5
0
7
0
MACRA6
MACRD6
MACRA1
6
0
6
0
6
4
0
SU.MACRADL
MAC Read Address Low Register
140h
SU.MACRADH
MAC Read Address High Register
141h
SU.MACRD0
MAC Read Data Byte 0
142h
MACRD5
MACRA5
MACRA1
5
0
5
0
5
3
0
MACRD4
MACRA4
MACRA1
174 of 344
0
0
4
4
4
2
0
MACRA3
MACRD3
MACRA1
3
0
3
0
3
1
0
MACRD2
MACRA2
MACRA1
2
0
2
0
2
0
0
MACRA1
MACRD1
MACRA9
1
0
1
0
1
0
MACRD0
MACRA0
MACRA8
0
0
0
0
0
0

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