DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 199

IC ETH TXRX T1/E1/J1 256-BGA

DS33R11+

Manufacturer Part Number
DS33R11+
Description
IC ETH TXRX T1/E1/J1 256-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R11+

Protocol
T1/E1/J1
Voltage - Supply
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Register Name:
Register Description:
Register Address:
0334h:
Bit #
Name
Default
0335h:
Bit #
Name
Default
0336h:
Bit #
Name
Default
0337h:
Bit #
Name
Default
Bits 0 - 31: Frames Aborted Due to FIFO Under Run Counter (TXFRMU[0:31]) 32 bit value indicating the
number of frames aborted due to FIFO under run. Each time a frame is aborted due to FIFO under run, this
counter is incremented by 1. This counter resets only upon device reset, does not saturate, and rolls-over to zero
upon reaching the maximum value. The user should ensure that the measurement period is less than the minimum
length of time required for the counter to increment 2^32-1 times at the maximum frame rate. The user should store
the value from the beginning of the measurement period for later calculations, and take into account the possibility
of a roll-over to occurring.
TXFRMU7
TXFRMU31
TXFRMU23
TXFRMU15
31
23
15
07
0
0
0
0
TXFRMU6
TXFRMU30
TXFRMU22
TXFRMU14
06
30
22
14
0
0
0
0
SU.TxFrmUndr
MAC Transmit Frame Under Run Counter
0334h (indirect)
TXFRMU5
TXFRMU29
TXFRMU21
TXFRMU13
05
29
21
13
0
0
0
0
TXFRMU4
TXFRMU28
TXFRMU20
TXFRMU12
199 of 344
28
20
12
04
0
0
0
0
TXFRMU3
TXFRMU27
TXFRMU19
TXFRMU11
27
19
11
03
0
0
0
0
TXFRMU2
TXFRMU26
TXFRMU18
TXFRMU10
26
18
10
02
0
0
0
0
TXFRMU1
TXFRMU25
TXFRMU17
TXFRMU9
25
17
09
01
0
0
0
0
TXFRMU0
TXFRMU24
TXFRMU16
TXFRMU8
00
24
16
08
0
0
0
0

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