DS33R11+ Maxim Integrated Products, DS33R11+ Datasheet - Page 208

• Manufacturer Part Number: DS33R11+
• Description: IC ETH TXRX T1/E1/J1 256-BGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS33R11+

• Protocol: T1/E1/J1
• Voltage - Supply: 1.8V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 4: Transmit RAI-CI Enable (TRAI-CI). Setting this bit causes the ESF RAI-CI code to be transmitted in the
FDL bit position.
Bit 3: Transmit AIS-CI Enable (TAIS-CI). Setting this bit and the TBL bit (TR.T1TCR1.1) causes the AIS-CI code
to be transmitted at TPOSO and TNEGO, as defined in ANSI T1.403.
Bit 2: Transmit Frame Mode Select (TFM)
Bit 1: Pulse Density Enforcer Enable (PDE). The framer always examines the transmit and receive data streams
for violations of these, which are required by ANSI T1.403: No more than 15 consecutive 0s and at least N 1s in
each and every time window of 8 x (N + 1) bits, where N = 1 through 23. Violations for the transmit and receive
data streams are reported in the TR.INFO1.6 and TR.INFO1.7 bits, respectively. When this bit is set to 1, the
T1/E1/J1 transceiver forces the transmitted stream to meet this requirement no matter the content of the
transmitted stream. When running B8ZS, this bit should be set to 0 since B8ZS encoded data streams cannot
violate the pulse density requirements.
Bit 0: Transmit Loop-Code Enable (TLOOP). See Section
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Software Signaling Insertion Enable for Channels 1 to 8 (CH1 to CH8). These bits determine which
channels are to have signaling inserted from the transmit signaling registers.
0 = do not transmit the ESF RAI-CI code
1 = transmit the ESF RAI-CI code
0 = do not transmit the AIS-CI code
1 = transmit the AIS-CI code (TR.T1TCR1.1 must also be set = 1)
0 = D4 framing mode
1 = ESF framing mode
0 = disable transmit pulse density enforcer
1 = enable transmit pulse density enforcer
0 = transmit data normally
1 = replace normal transmitted data with repeating code as defined in registers TR.TCD1 and TR.TCD2
0 = do not source signaling data from the TR.TSx registers for this channel
1 = source signaling data from the TR.TSx registers for this channel
CH8
—
7
0
7
0
TR.T1CCR1
T1 Common Control Register 1
07h
TR.SSIE1 (T1 Mode)
Software Signaling Insertion Enable 1
08h
CH7
—
6
0
6
0
CH6
—
5
0
5
0
TRAI-CI
208 of 344
CH5
0
0
4
4
10.19
TAIS-CI
for details.
CH4
3
0
3
0
TFM
CH3
2
0
2
0
PDE
CH2
1
0
1
0
TLOOP
CH1
0
0
0
0