PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 774

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
3. Operation
12NC 9397 750 14321
Product data sheet
2.3.1 Arbiter Startup Behavior
3.1 Clock Programming
3.2 Register Programming Guidelines
After reset is de-asserted, the arbiter is placed in boot mode. In this mode, the arbiter
sequentially grants each agent access to the memory if the agent has asserted its
request. After de-assertion of rst_an starting with req[0], then req[1], etc. Four agents
are checked in each clock cycle. This means that in the situation that only req[15] is
asserted, it will take four clock cycles before the arbiter will grant this agent. In the first
clock cycle it will check req[0] up to req[3], in the second clock cycle req[4] up to
req[7], in the third clock cycle req[8] up to req[11] and the fourth clock cycle req[12] up
to req[15]. The boot counter increments to next value when all agents corresponding
to that count value have been serviced or when there is no request from the agents
corresponding to that count value.
This mode is not intended to intelligently allocate memory bandwidth. Its goal is to
simply make sure that all agents that request get granted. While in boot mode, it is
expected that the system software will set up the arbiter via the DTL MMIO port and
switch to the normal operation mode. As there are two sets of configuration registers
(A and B), software should initialize one of the sets and then select the normal
operation mode that corresponds to that set via a write to the Arbiter Control register.
If necessary, the alternate set may be configured differently and the new configuration
may be engaged by simply writing the new mode in the Arbiter Control register.
The Hub operates with the Memory Controller clock, as well as the clocks of all the
peripheral modules that connect to the Hub. There is no separate clock for the Hub.
The default configuration of the Arbiter is to provide Round Robin access to all
peripheral devices. This can be altered by software by programming the Arbiter. Once
the Arbiter configuration is completed, the system should be able to operate without
further change to the Arbiter; however it is possible for software to change the Arbiter
configuration on-the-fly in order to change the minimum latency or the minimum
memory bandwidth that is available to each peripheral device.
Remark: The active set of configuration registers (set A or set B) cannot be read by
software once that set is activated. The inactive set may be safely written or read. If
software needs to have access to the values within the active set, then a copy of these
values should be maintained in main memory as a reference.
Rev. 2 — 1 December 2004
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Chapter 26: Memory Arbiter
PNX15xx Series
26-6