LH28F800BJHE-PBTLT9 Sharp Microelectronics, LH28F800BJHE-PBTLT9 Datasheet - Page 24

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LH28F800BJHE-PBTLT9

Manufacturer Part Number
LH28F800BJHE-PBTLT9
Description
Flash Mem Parallel 3V/3.3V 8M-Bit 1M x 8 90ns 48-Pin TSOP
Manufacturer
Sharp Microelectronics
Datasheet

Specifications of LH28F800BJHE-PBTLT9

Package
48TSOP
Cell Type
NOR
Density
8 Mb
Architecture
Sectored
Block Organization
Asymmetrical
Location Of Boot Block
Bottom
Typical Operating Supply Voltage
3|3.3 V
Sector Size
8KByte x 8|64KByte x 15
Timing Type
Asynchronous
Operating Temperature
-40 to 85 °C
Interface Type
Parallel
FULL STATUS CHECK PROCEDURE
Word/Byte Write Successful
Read Status Register
Write 40H or 10H
Write Word/Byte
Data and Address
Word/Byte Write
Check if Desired
Data(See Above)
Status Register
Read Status
Full Status
Write 70H
Complete
Register
SR.3=
SR.4=
SR.7=
SR.7=
SR.1=
Read
Start
1
1
0
0
0
0
0
1
1
1
Word/Byte Write Error
Device Protect Error
V
Word/Byte
Suspend
CCW
No
Write
Range Error
Figure 8. Automated Word/Byte Write Flowchart
Yes
Suspend Word/Byte
Write Loop
Repeat for subsequent word/byte writes.
SR full status check can be done after each word/byte write, or after a sequence of
Write FFH after the last word/byte write operation to place device in read array mode.
SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register command in cases
If error is detected, clear the Status Register before attempting retry or other error recovery.
Operation
word/byte writes.
Operation
where multiple locations are written before full status is checked.
Standby
Standby
Standby
Standby
Standby
Write
Write
Write
Read
Read
Bus
Bus
Setup Word/Byte Write
Word/Byte Write
Read Status
Command
Command
Register
Data=70H
Addr=X
Status Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Data=40H or 10H
Addr=X
Data=Data to Be Written
Addr=Location to Be Written
Status Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Check SR.3
1=V
Check SR.1
1=Device Protect Detect
Check SR.4
1=Data Write Error
CCW
Error Detect
Comments
Comments
Rev. 1.27

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