LH28F800BJHE-PBTLT9 Sharp Microelectronics, LH28F800BJHE-PBTLT9 Datasheet - Page 56

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LH28F800BJHE-PBTLT9

Manufacturer Part Number
LH28F800BJHE-PBTLT9
Description
Flash Mem Parallel 3V/3.3V 8M-Bit 1M x 8 90ns 48-Pin TSOP
Manufacturer
Sharp Microelectronics
Datasheet

Specifications of LH28F800BJHE-PBTLT9

Package
48TSOP
Cell Type
NOR
Density
8 Mb
Architecture
Sectored
Block Organization
Asymmetrical
Location Of Boot Block
Bottom
Typical Operating Supply Voltage
3|3.3 V
Sector Size
8KByte x 8|64KByte x 15
Timing Type
Asynchronous
Operating Temperature
-40 to 85 °C
Interface Type
Parallel
A-1.2 Glitch Noises
as shown in Figure A-2 (b). The acceptable glitch noises are illustrated in Figure A-2 (a).
Do not input the glitch noises which are below V
See the “DC CHARACTERISTICS“ described in specifications for V
Input Signal
Input Signal
V
V
IH
IL
(Max.)
(Min.)
(a) Acceptable Glitch Noises
Figure A-2. Waveform for Glitch Noises
IH
(Min.) or above V
Input Signal
Input Signal
IL
IH
V
V
(Max.) on address, data, reset, and control signals,
IH
IL
(Min.) and V
(Max.)
(Min.)
(b)
NOT
IL
Acceptable Glitch Noises
(Max.).
Rev. 1.10
iii

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