LH28F800BJHE-PBTLT9 Sharp Microelectronics, LH28F800BJHE-PBTLT9 Datasheet - Page 29

• Manufacturer Part Number: LH28F800BJHE-PBTLT9
• Description: Flash Mem Parallel 3V/3.3V 8M-Bit 1M x 8 90ns 48-Pin TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LH28F800BJHE-PBTLT9

• Package: 48TSOP
• Cell Type: NOR
• Density: 8 Mb
• Architecture: Sectored
• Block Organization: Asymmetrical
• Location Of Boot Block: Bottom
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 8KByte x 8|64KByte x 15
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

FULL STATUS CHECK PROCEDURE
OTP Program Successful
Write Data and Address
Read Status Register
Check if Desired
Data(See Above)
Status Register
OTP Program
Read Status
Write C0H
Full Status
Write 70H
Complete
Register
SR.3=
SR.4=
SR.7=
SR.7=
SR.1=
Read
Start
1
1
0
0
0
0
0
1
1
1
Device Protect Error
OTP Program Error
V
CCW
Range Error
Figure 13. Automated OTP Program Flowchart
Repeat for subsequent OTP programs.
SR full status check can be done after each OTP program, or after a sequence of
Write FFH after the last OTP program operation to place device in read array mode.
SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register command in cases
If error is detected, clear the Status Register before attempting retry or other error recovery.
Operation
OTP programs.
Operation
where multiple locations are written before full status is checked.
Standby
Standby
Standby
Standby
Standby
Write
Write
Write
Read
Read
Bus
Bus
Setup OTP Program
OTP Program
Read Status
Command
Command
Register
Data=70H
Addr=X
Status Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Data=C0H
Addr=X
Data=Data to Be Written
Addr=Location to Be Written
Status Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Check SR.3
1=V
Check SR.1
1=Device Protect Detect
Check SR.4
1=Data Write Error
CCW
Error Detect
Comments
Comments
Rev. 1.27