M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 179
M28529G-12
Manufacturer Part Number
M28529G-12
Description
ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529G-12.pdf
(309 pages)
Specifications of M28529G-12
Package
484BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3.135 V
Maximum Operating Supply Voltage
1.89|3.465 V
Maximum Output Rate
8.192 Mbps
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2.2.24
The RXHDR4 register contains the fourth byte of the Receive Cell Header. (See 0x18—RXHDR1.)
2.2.25
The RXMSK1 register contains the first byte of the Receive Cell Mask. It modifies ATM cell screening, which
compares the Receive Cell Header Registers to the incoming cells. Setting a bit in the Mask Register causes the
corresponding bit in the received ATM cell header to be disregarded for screening. For example, setting RXMSK1
bit 0 to 1 causes ATM cells to be accepted with either 1 or 0 in the octet 1, bit 0 position. Combinations of Receive
Header Mask bits can select groups of ATM VPI/VCIs for reception. This mask consists of 32 bits divided among
four registers.
28529-DSH-001-K
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0x1B—RXHDR4 (Receive Cell Header Control Register 4)
0x1C—RXMSK1 (Receive Cell Mask Control Register 1)
RxHdr4[7]
RxHdr4[6]
RxHdr4[5]
RxHdr4[4]
RxHdr4[3]
RxHdr4[2]
RxHdr4[1]
RxHdr4[0]
RxMsk1[7]
RxMsk1[6]
RxMsk1[5]
RxMsk1[4]
RxMsk1[3]
RxMsk1[2]
RxMsk1[1]
RxMsk1[0]
Name
Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
These bits hold the Receive Header values for Octet 4 of the incoming cell.
These bits hold the Receive Header Mask for Octet 1 of the incoming cell.
®
Description
Description
Registers
164
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