M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 305
M28529G-12
Manufacturer Part Number
M28529G-12
Description
ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529G-12.pdf
(309 pages)
Specifications of M28529G-12
Package
484BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3.135 V
Maximum Operating Supply Voltage
1.89|3.465 V
Maximum Output Rate
8.192 Mbps
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Table 4-8.
28529-DSH-001-K
Comments: 24 hour PM intervals require external software. No threshold crossing feature in driver. Link Fault failures are not defined in standard.
OAM.63
OAM.64
OAM.65
OAM.66
OAM.67
OAM.68
OAM.69
OAM.70
OAM.71
OAM.72
OAM.73
OAM.74
OAM.75
OAM.76
OAM.77
OAM.78
OAM.79
Item
Does the implementation report a Tx Fault failure alarm for any
implementation specific Tx fault declared at the NE?
Does the implementation report a Rx Fault failure alarm for any
implementation specific Rx fault declared at the NE?
Does the implementation report a Tx-Unusable-FE failure alarm when it
receives Tx-Unusable from FE?
Does the implementation report a Rx-Unusable-FE failure alarm when it
receives Rx-Unusable from FE?
Does the implementation report a Start-up-FE failure alarm when it receives
this signal from FE (the declaration of this failure alarm may be delayed to
ensure the FE remains in Start-up)?
Does the implementation report a Config-Aborted failure alarm when the FE
tries to use unacceptable configuration parameters?
Does the implementation report a Config-Aborted-FE failure alarm when the
FE reports unacceptable configuration parameters?
Does the implementation report an Insufficient-Links failure alarm when less
than P
Does the implementation report an Insufficient-Links-FE failure alarm when
the FE reports that less than P
active?
Does the implementation report a Blocked-FE failure alarm when the FE
reports that it is blocked?
Does the implementation report GR-Timing-Mismatch when the FE transmit
clock mode is different than the NE transmit clock mode?
In the case of the LIF, LODS, RFI-IMA and Fault failure alarms, does the
implementation support 2.5 ± 0.5 seconds as a default persistence checking
time to enter a failure alarm condition?
In the case of the LIF, LODS, RFI-IMA and Fault failure alarms, does the
implementation support 10 ± 0.5 seconds as a default persistence clearing
time to exit the failure alarm condition?
In the case of the LIF, LODS, RFI-IMA and Fault failure alarms, does the IMA
allow configuration of other values for default persistence checking time to
enter a failure alarm condition?
In the case of the LIF, LODS, RFI-IMA and Fault failure alarms, does the IMA
allow configuration of other values for default persistence checking time to
exit the same failure alarm condition?
Does the implementation ensure that the Tx-Fault failure alarm, as defined in
(O-28) on page 79, is not cleared until the fault that led to the declaration of
the alarm is no longer present for the duration specified to clear the alarm in
(R-152) on page 80?
Does the implementation ensure that the Rx-Fault failure alarm, as defined in
(O-29) on page 79, is not cleared until the fault that led to the declaration of
the alarm is no longer present for the duration specified to clear the alarm in
(R-152) on page 80?
Tx
IMA Interface OAM Operation Functions (5 of 5)
transmit links or P
Rx
Protocol feature
Tx
receive links are active?
transmit links or P
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Rx
receive links are
®
(O-28)
(O-29)
Cond. for
Status
Status
Pred.
M
M
M
M
M
M
M
M
M
M
M
M
M
O
O
O
O
(O-28)
(O-29)
(R-143)
(R-144)
(R-145)
(R-146)
(R-147)
(R-148)
(R-149)
(R-150)
(R-151)
(R-152)
(R-152)
(O-30)
(O-30)
(CR-11)
(CR-12)
Ref.
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Yes X No__
Appendices
Support
290
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