M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 95

• Manufacturer Part Number: M28529G-12
• Description: ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of M28529G-12

• Package: 484BGA
• Utopia Type: Level 2
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.71|3.135 V
• Maximum Operating Supply Voltage: 1.89|3.465 V
• Maximum Output Rate: 8.192 Mbps

The solution for high port count and variable rate DSL applications is to use internal counters and frequency
synthesizers referenced from a common (n x y kHz) clock input with feedback from the cell available signal from the
PHY side UTOPIA bus.
For low port count, single rate applications that take advantage of the embedded ATM Cell Processor, the use of
receive bit clock inputs is the most straight-forward solution.
1.12.5
1.12.5.1
1.12.5.1.1
Figure 1-21
of the simplest implementations of IMA when a clock equal to 24 times the line rate is available. Several issues are
worth noting:
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•
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The device is configured using a software driver. The following code is an example of calls to the driver:
28529-DSH-001-K
The IMA_RefClk input is unused and should be tied to ground. The M28529 is deriving all required clocks from
the Serial port clocks and the IMA_SysClk.
The IMA_SysClk is used to synchronize the SPRxClk inputs to internal logic (via the divide by 16 block).
The SPRxClk is being used to generate the Rx IDCR clock. Also note that the receive clock from any link within
a group could be used to generate the Rx IDCR for that group.
The IMA_SysClk is being used to derive the TX IDCR clock.
IMA_LINK_TYPE = IMA_DS1
IMA_DSL_USE_REF_CLK2 = IMA_INACTIVE
IMA_DSL_REF_GENERATOR = IMA_INACTIVE
IMA_ALT_RX_TRL = IMA_INACTIVE
IMA_GRP_TX_TRL_SRC = IMA_REF_XCLK (grp#)
IMA_GRP_RX_TRL_SRC = IMA_RX_TRL_(x) (grp#)
illustrates T1/E1 with internal serial ports, using IMA_SysClk equal to 24 times the line rate. This is one
IMA Internal Timing Examples
T1/E1 Using Internal Serial Ports
Using IMA_SysClk as the Transmit Clock
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Functional Description
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