M28529G-12 Mindspeed Technologies, M28529G-12 Datasheet - Page 57
M28529G-12
Manufacturer Part Number
M28529G-12
Description
ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529G-12.pdf
(309 pages)
Specifications of M28529G-12
Package
484BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3.135 V
Maximum Operating Supply Voltage
1.89|3.465 V
Maximum Output Rate
8.192 Mbps
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Table 1-11.
28529-DSH-001-K
MAS*, MWr*
MicroAddr[0]
MicroAddr[1]
MicroAddr[2]
MicroAddr[3]
MicroAddr[4]
MicroAddr[5]
MicroAddr[6]
MicroAddr[7]
MicroAddr[8]
MicroAddr[9]
MicroAddr[10]
MicroAddr[11]
MicroData[0]
MicroData[1]
MicroData[2]
MicroData[3]
MicroData[4]
MicroData[5]
MicroData[6]
MicroData[7]
MicroInt*
Pin Label
M2852x Pin Descriptions (2 of 18)
Microprocessor Address
Strobe
Microprocessor Address
Bus
Microprocessor Data Bus
Microprocessor Interrupt
Request
Signal Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
No.
AA1
W3
W2
W1
Y2
U2
U1
R4
R3
R2
P4
R1
P3
P2
V4
Y1
V3
U4
V2
T3
T2
T1
I/O
I/O
O
I
I
These 12 bits are an address input for identifying the register to
When active low, the device needs servicing. It remains active until
When MSyncMode is asserted high, this pin is an address strobe
pin. When the MAS* pin is asserted low, it indicates a valid
address, MicroAddr[11:0]. This signal is used to qualify read and
write accesses.
When MSyncMode is asserted low, this pin is a write control pin.
When MWr* is asserted low, a write access is enabled and the
MicroData[7:0] pin values will be written to the memory location
indicated by the MicroAddr[11:0] pins. The write access assumes
the device is chip selected (MCS* = 0), a read access is not being
requested (MRd* = 1), and the device is not being reset (Reset* =
1).
access.
A bi-directional data bus for reading and writing data to internal
registers.
the pending interrupt is processed by the Interrupt Service
Routine. This pin is an open drain output for an external wired OR
logic implementation. An external pull-up resistor is required for
this pin.
®
Description
Functional Description
42
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