ATtiny461A Atmel Corporation, ATtiny461A Datasheet - Page 11

• Manufacturer Part Number: ATtiny461A
• Manufacturer: Atmel Corporation

Specifications of ATtiny461A

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

4.5
4.5.1
8197C–AVR–05/11
Stack Pointer
SPH and SPL – Stack Pointer Register
In different addressing modes these address registers function as automatic increment and
automatic decrement (see the instruction set reference for details).
The Stack is mainly used for storing temporary data, local variables and return addresses for
interrupts and subroutine calls. The Stack Pointer Register always points to the top of the Stack,
in the data SRAM Stack area where the subroutine and interrupt stacks are located.
The Stack in the data SRAM must be defined by the program before any subroutine calls are
executed or interrupts are enabled. The Stack Pointer must be set to point above start of the
SRAM (see
internal SRAM.
Note that the Stack is implemented as growing from higher to lower memory locations. This
means a Stack PUSH command decreases the Stack Pointer. See
Table 4-1.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent.
Note that the data space in some implementations of the AVR architecture is so small that only
SPL is needed. In this case, the SPH Register will not be present.
Y-register
Z-register
Bit
0x3E (0x5E)
0x3D (0x5D)
Read/Write
Initial Value
Instruction
PUSH
ICALL
RCALL
POP
RET
RETI
Figure 5-2 on page
RAMEND
RAMEND
SP15
Stack Pointer instructions
R/W
R/W
SP7
15
7
Stack pointer
Decremented by 1
Decremented by 2
Incremented by 1
Incremented by 2
15
7
R29 (0x1D)
15
7
R31 (0x1F)
RAMEND
RAMEND
SP14
R/W
R/W
SP6
14
6
16). The initial Stack Pointer value equals the last address of the
RAMEND
RAMEND
SP13
R/W
SP5
R/W
13
5
ZH
YH
0
RAMEND
RAMEND
SP12
Description
Data is pushed onto the stack
Return address is pushed onto the stack with a
subroutine call or interrupt
Data is popped from the stack
Return address is popped from the stack with return
from subroutine or return from interrupt
SP4
R/W
R/W
12
4
RAMEND
RAMEND
ATtiny261A/461A/861A
SP11
SP3
R/W
R/W
11
3
0
7
R28 (0x1C)
7
R30 (0x1E)
RAMEND
RAMEND
SP10
R/W
R/W
SP2
10
2
Table
RAMEND
RAMEND
R/W
R/W
SP9
SP1
4-1.
9
1
YL
ZL
0
RAMEND
RAMEND
SP8
SP0
R/W
R/W
8
0
SPH
SPL
11
0
0
0