ATtiny461A Atmel Corporation, ATtiny461A Datasheet - Page 20

• Manufacturer Part Number: ATtiny461A
• Manufacturer: Atmel Corporation

Specifications of ATtiny461A

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

5.4
5.4.1
5.5
5.5.1
20
I/O Memory
Register Description
ATtiny261A/461A/861A
General Purpose I/O Registers
EEARH – EEPROM Address Register
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
The I/O space definition of the ATtiny261A/461A/861A is shown in
277.
All I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed using the
LD/LDS/LDD and ST/STS/STD instructions, enabling data transfer between the 32 general pur-
pose working registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F
are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of sin-
gle bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set
section for more details. When using the I/O specific commands IN and OUT, the I/O addresses
0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST
instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, the CBI and
SBI instructions will only operate on the specified bit, and can therefore be used on registers
containing such Status Flags. The CBI and SBI instructions work on registers in the address
range 0x00 to 0x1F, only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny261A/461A/861A contains three General Purpose I/O Registers. These registers can
be used for storing any information, and they are particularly useful for storing global variables
and Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 7:1 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bit 0 – EEAR8: EEPROM Address
This is the most significant EEPROM address bit of ATtiny861A. In devices with less EEPROM,
i.e. ATtiny261A/ATtiny461A, this bit is reserved and will always read zero. The initial value of the
EEPROM Address Register (EEAR) is undefined and a proper value must therefore be written
before the EEPROM is accessed.
Bit
0x1F (0x3F)
Read/Write
Initial Value
R
7
–
0
R
6
–
0
5
–
R
0
R
4
–
0
R
3
–
0
R
2
–
0
“Register Summary” on page
R
1
–
0
EEAR8
R/W
X/0
0
8197C–AVR–05/11
EEARH