SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 109

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 17-5. NRSTB Reset when FWUP = 1 and NRSTB is Released After FWUP = 0
17.3.5
17.3.5.1
17.3.5.2
6257A–ATARM–20-Feb-08
Core Reset
RC Oscillator
core_nreset
vr_standby
supply_on
Brownout Detector Reset
Voltage Regulation Loss Reset
sram_on
NRSTB
FWUP
output
vr_ok
The Supply Controller manages the vddcore_nreset signal to the Reset Controller, as described
previously in
mally asserted before shutting down the core power supply and released as soon as the core
power supply is correctly regulated.
There are two additional sources which can be programmed to activate vddcore_nreset:
The Brownout Detector is capable of generating a reset of the system. This can be enabled by
setting the BODRSTEN bit in the Supply Controller Mode Register, SUPC_MR.
If BODRSTEN is set and a brownout is detected, the vddcore_nreset signal is immediately acti-
vated for a minimum of 2 slow clock cycles.
The voltage regulator provides the vr_ok signal which indicates that the regulation is operating
as programmed. If this signal is lost for longer than 1 slow clock period while the voltage regula-
tor is enabled, the Supply Controller can assert vddcore_nreset. This feature is enabled by
writing the bit, VRRSTEN (Voltage Regulator Reset Enable) to 1 in the Supply Controller Mode
Register, SUPC_MR and if the voltage regulator is set in normal mode (VRMODE is at 0).
When the voltage regulator is in deep mode, this feature is not enabled.
If VRRSTEN is set and the voltage regulation is lost (output voltage of the regulator too low), the
vddcore_nreset signal is asserted for a minimum of 2 slow clock periods and then released if
vr_ok has been reactivated. The VRRSTS bit is set in the Supply Controller Status Register,
SUPC_SR, so that the user can know the source of the last reset.
• the brownout detector
• voltage regulation loss
Section 17.3.4 ”Backup Power Supply
30 Slow Clock Cycles = about 1 ms
AT91SAM7L128/64 Preliminary
Reset”. The vddcore_nreset signal is nor-
at least 1 Slow Clock Cycle
109