SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 535

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

35.4.5
Table 35-17. XIN Clock Electrical Characteristics (In bypass mode)
Note:
6257A–ATARM–20-Feb-08
Symbol
1/(t
1/(t
t
t
t
t
t
t
t
t
C
R
V
V
CPXIN
CPXIN
CHXIN
CHXIN
CLXIN
CLXIN
CLCH
CHCL
XIN_IL
XIN_IH
IN
IN
CPXIN
CPXIN
1. These characteristics apply only in FFPI mode
2. These characteristics apply only when the XTAL Oscillator is in bypass mode (i.e., when MOSCEN = 0 and
)
)
XIN Clock Characteristics
OSCBYPASS = 1 in the CKGR_MOR register, see the Clock Generator Main Oscillator Register.
Parameter
XIN Clock Frequency
XIN Clock Frequency
XIN Clock Period
XIN Clock Period
XIN Clock High Half-period
XIN Clock High Half-period
XIN Clock Low Half-period
XIN Clock Low Half-period
Rise Time
Fall Time
XIN Input Capacitance
XIN Pull-down Resistor
V
V
XIN
XIN
Input Low-level Voltage
Input High-level Voltage
V
XIN_IL
V
XIN_IH
t
CPXIN
AT91SAM7L128/64 Preliminary
Conditions
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
t
CPXIN
0.8 x V
t
CLCH
Min
-0.3
100
400
400
44
22
11
50
11
3
VDDIO1
t
CPXIN
t
CHXIN
0.2 x V
V
VDDIO1
Max
10
44
6
5
VDDIO1
+0.3
t
CHCL
Units
MHz
kHz
MΩ
pF
ns
ns
µs
µs
ns
µs
ns
ns
V
V
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