SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 553

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

38.2.4
38.2.4.1
38.2.4.2
38.2.5
38.2.5.1
6257A–ATARM–20-Feb-08
Two Wire Interface (TWI)
Universal Synchronous Asynchronous Receiver Transmitter (USART)
TWI: Switching from Slave to Master Mode
TWI: Switching from Slave to Master Mode
USART: DCD is Active High Instead of Low
If all chip selects are configured with Baudrate = 1, the issue does not appear.
When the TWI is set in slave mode and if a master write access is performed, the start event is
correctly generated but the SCL line is stuck at 1, so no transfer is possible.
Two software workarounds are possible:
The RXRDY Flag is not reset when a Software reset is performed.
After a Software Reset, the Register TWI_RHR must be read.
DCD signal is active at “High” level in USART block (Modem Mode).
DCD should be active at “Low” level.
Add an inverter.
1. Perform a software reset before going to master mode (TWI must be reconfigured).
2. Perform a slave read access before switching to master mode.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
AT91SAM7L128/64 Preliminary
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