AD9628 Analog Devices, AD9628 Datasheet - Page 10

• Manufacturer Part Number: AD9628
• Description: 12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9628

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 125MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Bip,SE-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9628
INTERLEAVED
MULTIPLEXED
MULTIPLEXED
CHANNEL A
CHANNEL B
PARALLEL
CHANNEL
CHANNEL
MODE
MODE
MODE
DCOA/DCOB
CH B DATA
CH A DATA
D11+/D10+ (MSB)
D11+/D10+ (MSB)
D11–/D10– (MSB)
D11–/D10– (MSB)
CLK+
CLK–
D1+/D0+ (LSB)
D1+/D0+ (LSB)
D1–/D0– (LSB)
D1–/D0– (LSB)
VIN
D11+ (MSB)
D11– (MSB)
D0+ (LSB)
D0– (LSB)
DCO–
DCO+
CLK+
CLK–
VIN
N – 1
t
CH
Figure 3. CMOS Interleaved Output Mode Data Output Timing
N – 1
t
CH
Figure 4. LVDS Modes for Data Output Timing
t
t
DCO
PD
t
N
PD
N – 16
t
N – 16
CH B
CH A
t
A
CLK
t
DCO
t
SKEW
Rev. 0 | Page 10 of 44
N
N – 15
N – 15
CH A
CH B
N + 1
t
CH A10
CH B10
N – 16
N – 16
CH A0
N – 16
N – 16
CH B0
N – 16
N – 16
t
A
CH A
CH A
CLK
t
SKEW
N – 14
N – 14
CH B
CH A
CH A11
CH B11
N – 16
N – 16
CH A1
N – 16
N – 16
CH B1
N – 16
N – 16
N + 1
CH B
CH B
N – 13
N – 13
CH B
CH A
N + 2
CH B10
CH A10
N – 15
N – 15
CH A0
N – 15
N – 15
CH B0
N – 15
N – 15
CH A
CH A
N – 12
N – 12
CH B
CH A
CH A11
CH B11
N – 15
N – 15
CH A1
N – 15
N – 15
CH B1
N – 15
N – 15
N + 2
CH B
CH B
N – 11
N + 3
N – 11
CH A
CH B
CH A10
CH B10
N – 14
N – 14
CH A0
N – 14
N – 14
CH B0
N – 14
N – 14
CH A
CH A
N – 10
N – 10
CH B
CH A
CH A11
CH B11
N + 3
N – 14
N – 14
CH A1
N – 14
N – 14
CH B1
N – 14
N – 14
CH B
CH B
CH A
N – 9
N + 4
CH B
N – 9
CH A10
CH B10
CH B0
N – 13
N – 13
CH A0
N – 13
N – 13
N – 13
N – 13
CH A
CH A
CH B
N – 8
CH A
N – 8
CH A11
CH B11
N + 4
N – 13
N – 13
CH A1
N – 13
N – 13
CH B1
N – 13
N – 13
CH B
CH B
CH A10
CH B10
N + 5
N – 12
N – 12
CH A0
N – 12
N – 12
CH B0
N – 12
N – 12
CH A
CH A
N + 5