LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 33

• Manufacturer Part Number: LPC3130_3131
• Description: The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
Fig 9.
EBI_NCAS_BLOUT_0
EBI_NRAS_BLOUT_1
EBI_DQM_0_NOE
NAND_RYBN[0:3]
NAND_NCS_[0:3]
Diagram of LCD and MPMC multiplexing
6.26.2 Multiplexing between LCD and MPMC
The multiplexing between the LCD interface and MPMC allows for the following two
modes of operation:
The external NAND flash is accessible in both modes.
The block diagram
involved in the pin interface multiplexing between the EBI, NAND flash controller, MPMC,
and RAM-based LCD interface.
Figure 9
signals are visible.
control
control
control
•
•
3
MPMC-mode: SDRAM and bus-based LCD or SRAM.
LCD-mode: Dedicated LCD-Interface.
INTERFACE
only shows the signals that are involved in pad-muxing, so not all interface
FLASH
MPMC
NAND
LCD
control
(ALE, CLE)
control
data
LCD_DB_[15:2]
data
LCD_DB_[1:0],
control
data
data
address
Figure 9
Rev. 1 — 9 February 2009
16
16
16
gives a high level overview of the modules in the chip that are
2
EBI
14
6
6
Low-cost, low-power ARM926EJ-S microcontrollers
address
EBI_A_[1:0]
data
address
EBI_A_[15:2]
SYSCREG_MUX_LCD_EBI_SEL
16
2
(I/O multplexing)
14
register
1
0
1
0
LPC31xx
SUP4
SUP8
14
2
6
LPC3130/3131
EBI_A_0_ALE
EBI_A_1_CLE
EBI_D_[15:0]
LCD_DB_[15:2] (LCD mode)/
EBI_A_[15:2] (MPMC mode)
LCD_CSB/EBI_NSTCS_0
LCD_DB_1/EBI_NSTCS_1
LCD_DB_0/EBI_CLKOUT
LCD_E_RD/EBI_CKE
LCD_RS/EBI_NDYCS
LCD_RW_WR/EBI_DQM_1
mode
LCD
© NXP B.V. 2009. All rights reserved.
MPMC
mode
002aae157
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