XC2VP70 Xilinx, Inc., XC2VP70 Datasheet - Page 66

• Manufacturer Part Number: XC2VP70
• Description: Virtex-ii Pro Field Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Virtex-II Pro Performance Characteristics
This section provides the performance characteristics of
some common functions and designs implemented in
Virtex-II Pro devices. The numbers reported here are fully
characterized worst-case values. Note that these values are
subject to the same guidelines as
Characteristics
Table 12: Pin-to-Pin Performance
DS083-3 (v2.12) November 11, 2003
Advance Product Specification
Basic Functions:
Memory:
Block RAM
Distributed RAM
16-bit Address Decoder
32-bit Address Decoder
64-bit Address Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
Combinatorial (pad to LUT to pad)
Pad to setup
Clock to Pad
Pad to setup
Clock to Pad
R
(speed files).
Description
Virtex-II Pro Switching
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
Pin-to-Pin (w/ I/O delays)
-7
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Table 12
including IOB delays; that is, delay through the device from
input pin to output pin. In the case of multiple inputs and out-
puts, the worst delay is reported.
-6
provides pin-to-pin values (in nanoseconds)
-5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Device Used & Speed Grade
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
9