XC2VP70 Xilinx, Inc., XC2VP70 Datasheet - Page 77
XC2VP70
Manufacturer Part Number
XC2VP70
Description
Virtex-ii Pro Field Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet
1.XC2VP70.pdf
(409 pages)
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Virtex-II Pro Switching Characteristics
IOB Input Switching Characteristics
Input delays associated with the pad are specified for LVCMOS 2.5V levels. For other standards, adjust the delays with the
values shown in
Table 27: IOB Input Switching Characteristics
20
Propagation Delays
Propagation Delays
Pad to I output, no delay
Pad to I output, with delay
Pad to output IQ via transparent latch,
no delay
Pad to output IQ via transparent latch,
with delay
Clock CLK to output IQ
Description
IOB Input Switching Characteristics Standard
Symbol
T
T
T
T
T
IOCKIQ
IOPLID
IOPID
IOPLI
IOPI
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XC2VP100
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XC2VP70
XC2VP20
XC2VP30
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XC2VP50
XC2VP70
XC2VP2
XC2VP4
XC2VP7
XC2VP2
XC2VP4
XC2VP7
Device
Adjustments.
All
All
All
-7
Speed Grade
DS083-3 (v2.12) November 11, 2003
0.87
2.07
2.07
2.07
2.32
1.72
1.89
2.07
2.21
0.89
4.76
4.76
4.76
3.62
3.77
4.31
4.92
4.99
0.60
-6
Advance Product Specification
0.91
2.26
2.26
2.26
2.54
1.83
2.02
2.17
2.33
0.93
5.21
5.21
5.21
3.86
4.01
4.57
5.11
5.19
0.67
-5
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
Units
R
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