XC2VP70 Xilinx, Inc., XC2VP70 Datasheet - Page 86

• Manufacturer Part Number: XC2VP70
• Description: Virtex-ii Pro Field Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Table 32: Output Delay Measurement Methodology
DS083-3 (v2.12) November 11, 2003
Advance Product Specification
LVTTL (all)
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
PCI33_3 - rising edge
PCI33_3 - falling edge
PCI66_3 - rising edge
PCI66_3 - falling edge
PCI-X - rising edge
PCI-X - falling edge
GTL
GTLP
HSTL Class I
HSTL Class II
HSTL Class III
HSTL Class IV
HSTL18 Class I
HSTL18 Class II
HSTL18 Class III
HSTL18 Class IV
SSTL2 Class I
SSTL2 Class II
SSTL18 Class I
SSTL18 Class II
Standard
R
(ohms)
R
1M
1M
1M
1M
1M
25
25
25
25
25
25
25
25
50
25
50
25
50
25
50
25
50
25
50
25
REF
C
REF
(pF)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(1)
V
V
V
V
V
V
V
V
V
1.65
1.25
0.75
0.94
2.03
0.94
2.03
0.94
2.03
MEAS
(V)
1.4
0.9
0.8
1.0
0.9
0.9
1.1
1.1
REF
REF
REF
REF
REF
REF
REF
REF
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
V
0.75
0.75
1.25
1.25
3.3
3.3
3.3
1.8
(V)
1.2
1.5
1.5
1.5
0.9
0.9
1.8
0.9
0.9
REF
www.xilinx.com
1-800-255-7778
0
0
0
0
0
0
0
Table 32: Output Delay Measurement Methodology
Notes:
1.
LVDS25
LVDSEXT25
BLVDS
LDT25
LVPECL25
LVDCI33
LVDCI25
LVDCI18
LVDCI15
HSTL DCI Class I
HSTL DCI Class II
HSTL DCI Class III
HSTL DCI Class IV
HSTL18 DCI Class I
HSTL18 DCI Class II
HSTL18 DCI Class III
HSTL18 DCI Class IV
SSTL2 DCI Class I
SSTL2 DCI Class II
SSTL DCI Class I
SSTL DCI Class II
GTL DCI
GTLP DCI
C
REF
Standard
is the capacitance of the probe, nominally 0 pF.
(ohms)
R
1M
1M
1M
1M
1M
1M
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
REF
C
REF
(pF)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(1)
V
V
V
V
V
V
V
V
V
V
V
V
1.23
1.65
1.25
0.75
MEAS
(V)
1.2
0.9
0.9
0.9
1.1
1.1
0.8
1.0
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
V
0.75
0.75
1.25
1.25
1.5
1.5
1.8
(V)
1.2
1.2
0.6
0.9
0.9
1.8
0.9
0.9
1.2
1.5
REF
0
0
0
0
0
0
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