cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 237
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cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
ACC Register Descriptions
5.3.2.2
ACC I/O Offset
Type
Reset Value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
28:22
31:20
19:0
Bit
Bit
31
30
29
21
20
Codec GPIO Control Register (ACC_GPIO_CNTL)
Name
GPIO_EN
INT_EN
WU_INT_EN
RSVD
INT_FLAG
WU_INT_FLAG
PIN_STS
Name
RSVD
04h
R/W
00000000h
RSVD
Description
GPIO Enable. This bit determines if the codec GPIO pin data is sent out in slot 12 of
the serial output stream.
0: Send 0s and tag slot 12 as invalid.
1: Send GPIO pin data and tag slot valid.
Codec GPIO Interrupt Enable. Allow a codec GPIO interrupt to set the codec GPIO
interrupt flag and generate an IRQ.
0: Disable.
1: Enable.
A GPIO interrupt is defined by serial data in slot 12, bit 0
Codec GPIO Wakeup Interrupt Enable. Allow a codec GPIO wakeup interrupt to set
the codec GPIO wakeup interrupt flag and generate an IRQ.
0: Disable.
1: Enable.
A codec GPIO wakeup interrupt is defined as a 0-to-1 transition of AC_S_IN or
AC_S_IN2 while the codec is powered down. This bit can only be set after the codec(s)
are powered down (See Audio Driver Power-up/down Programming Model on
page 90).
Reserved. Reads return 0.
Codec GPIO Interrupt Flag (Read to Clear). If the GPIO interrupt is enabled (bit 30 =
1) then this flag is set upon a codec GPIO interrupt event (serial data in slot 12, bit 0 =
1), and an IRQ is generated.
Codec GPIO Wakeup Interrupt Flag (Read to Clear). If the GPIO wakeup interrupt is
enabled (bit 29 = 1), then this flag is set when a GPIO wakeup interrupt occurs, and an
IRQ is generated.
Codec GPIO Pin Status (Read Only). This is the GPIO pin status that is received from
the codec in slot 12 of the serial input stream. This is updated every time slot 12 of the
input stream is tagged valid.
Note:
Description
Reserved. Reads return 0.
ACC_GPIO_STATUS Bit Descriptions
(Continued)
ACC_GPIO_CNTL Bit Descriptions
All 20 bits of input slot 12 are visible in this register, including reserved bits
within slot 12.
ACC_GPIO_CNTL Register Map
237
PIN_DATA
9
8
7
6
5
4
3
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