cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 453
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cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
GPIO Subsystem Register Descriptions
GPIO High Bank Lock Enable (GPIOH_LOCK_EN)
GPIO I/O Offset
Type
Reset Value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:15
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
RSVD
LKNE
LKPE
LKIP
LKIA
LKEE
LKFE
LKII
LKIE
LKPD
LKPU
LKA2
LKA1
LKOI
LKOD
LKOE
LKOV
BCh
R/W
00000000h
RSVD
Description
Reserved. Write to 0.
Lock GPIOH_IN_NEGEDGE_ENA. When set, writing to the GPIO Low Bank Input
Negative Edge Enable register (GPIO I/O Offset C4h) is prevented.
Lock GPIOH_IN_POSEDGE_EN. When set, writing to the GPIO Low Bank Input Posi-
tive Edge Enable register (GPIO I/O Offset C0h) is prevented.
Lock GPIOH_EVENTS_EN. When set, writing to the GPIO Low Bank Events Enable
(interrupts &PMEs) register (GPIO I/O Offset B8h) is prevented.
Lock GPIOH_IN_AUX1_SEL. When set, writing to the GPIO Low Bank Input Auxiliary
1 Select register (GPIO I/O Offset B4h) is prevented.
Lock GPIOH_IN_EVNTCNT_EN. When set, writing to the GPIO Low Bank Input Event
Count Enable register (GPIO I/O Offset ACh) is prevented.
Lock GPIOH_IN_FLTR_EN. When set, writing to the GPIO Low Bank Input Filter
Enable register (GPIO I/O Offset A8h) is prevented.
Lock GPIOH_IN_INVRT_EN. When set, writing to the GPIO Low Bank Input Invert
Enable register (GPIO I/O Offset A4h) is prevented.
Lock GPIOH_IN_EN. When set, writing to the GPIO Low Bank Input Enable register
(GPIO I/O Offset A0h) is prevented.
Lock GPIOH_PD_EN. When set, writing to the GPIO Low Bank Pull-Down Enable reg-
ister (GPIO I/O Offset 9Ch) is prevented.
Lock GPIOH_PU_EN. When set, writing to the GPIO Low Bank Pull-Up Enable regis-
ter (GPIO I/O Offset 98h) is prevented.
Lock GPIOH_OUT_AUX2_SEL. When set, writing to the GPIO Low Bank Output Aux-
iliary 2 Select register (GPIO I/O Offset 94h) is prevented.
Lock GPIOH_OUT_AUX1_SEL. When set, writing to the GPIO Low Bank Output Aux-
iliary 1 Select register (GPIO I/O Offset 90h) is prevented.
Lock GPIOH_OUT_INVRT_EN. When set, writing to the GPIO Low Bank Output Invert
Enable register (GPIO I/O Offset 8Ch) is prevented.
Lock GPIOH_OUT_OD_EN. When set, writing to the GPIO Low Bank Output Open-
Drain Enable register (GPIO I/O Offset 88h) is prevented.
Lock GPIOH_OUTPUT_ENABLE. When set, writing to the GPIO Low Bank Enable
register (GPIO I/O Offset 84h) is prevented.
Lock GPIOH_OUTPUT_VALUE. When set, writing to the GPIO Low Bank Output
Value register (GPIO I/O Offset 80h) is prevented.
GPIOH_LOCK_EN Bit Descriptions
GPIOH_LOCK_EN Register Map
(Continued)
453
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