cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 475

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

Revision 0.8
MFGPT Register Descriptions
5.17.2.4
MFGPT0 to MFGPT5 Setup registers are in the Working power domain while MFGPT6 and MFGPT7 Setup registers are in
the Standby power domain. Bits [11:0] are write-once; bit 12 is read-only.
MFPGT0 Setup (MFGPT0_SETUP)
MFGPT I/O Offset
Type
Reset Value
MFPGT1 Setup (MFGPT1_SETUP)
MFGPT I/O Offset
Type
Reset Value
MFPGT2 Setup (MFGPT2_SETUP)
MFGPT I/O Offset
Type
Reset Value
MFPGT3 Setup (MFGPT3_SETUP)
MFGPT I/O Offset
Type
Reset Value
15
Bit
15
14
13
12
11
10
14
MFGPT[x] Setup (MFGPT[x]_SETUP)
Name
MFGPT_CNT_EN
MFGPT_CMP2
MFGPT_CMP1
MFGPT_SETUP (RO)
MFGPT_STOP_EN
MFGPT_EXT_EN
13
06h
R/W
0000h
0Eh
R/W
0000h
16h
R/W
0000h
1Eh
R/W
0000h
12
11
Description
Counter Enable. Enable MFGPT for counting. 0: Disable; 1: Enable.
Compare 2 Output Status. If Conditioning Mode is set to Event, writing this bit to
a 1 clears the event until the next time Compare 2 goes from low-to-high; reading
returns the event status. For other modes, this bit follows current compare output
values and writes to this bit have no effect.
Compare 1 Output Status. If Conditioning Mode is set to Event, writing this bit to
a 1 clears the event until the next time Compare 1 goes from low-to-high; reading
returns the event status. For other modes, this bit follows current compare output
values and writes to this bit have no effect.
Setup (Read Only). Any value written to this bit is a ‘don’t care’. From reset, this
bit is low. If low, it indicates the MFGPT has not been setup and is currently dis-
abled. On the first write to this register, bits [11:0] are established per the write
and this bit is set to a 1. After this bit is set on the first write, bits [12:0] cannot be
changed and subsequent writes are ‘don’t care’.
Stop Enable. Enable counter to Stop on Sleep state for MFGPT0 to MFGPT5, or
Standby state for MFGPT6 and MFGPT7. 0: Disable; 1: Enable.
External Enable. External pin enabled to be MFGPT clear input. 0: Disable;
1: Enable.
MFGPT[x]_SETUP Bit Descriptions
10
MFGPT[x]_SETUP Register Map
(Continued)
MFGPT_CMP2
9
MODE
8
475
MFGPT_CMP1
MFPGT4 Setup (MFGPT4_SETUP)
MFGPT I/O Offset
Type
Reset Value
MFPGT5 Setup (MFGPT5_SETUP)
MFGPT I/O Offset
Type
Reset Value
MFPGT6 Setup (MFGPT6_SETUP)
MFGPT I/O Offset
Type
Reset Value
MFPGT7 Setup (MFGPT7_SETUP)
MFGPT I/O Offset
Type
Reset Value
7
MODE
6
5
26h
R/W
0000h
2Eh
R/W
0000h
36h
R/W
0000h
3Eh
R/W
0000h
4
3
MFGPT_SCALE
2
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