cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 548

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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Electrical Specifications
6.3.13 GPIO Signaling
The GPIO signals detailed in this sub-section use various
types of buffers depending upon chip configuration. For a
detailed explanation of buffer types, see Table 2-4 "Buffer
Type Characteristics" on page 28.
In this subsection, unless otherwise noted:
• All timing specifications are specified under the oper-
Note 1. GPIO configured: Input Enable = 1; AUX_IN, Output Enable, AUX_OUT_1, and AUX_OUT_2 = 0.
Note 2. PIN_OPT_LALL = 0 in Table 2-6 "DIVIL_BALL_OPT" on page 29.
Note 3. t
Note 4. GPIO configured: AUX_IN, Input Enable, AUX_OUT_1, AUX_OUT_2 = 0; Output Enable = 1; Open-drain = 0.
Note 5. Load per Table 6-15 "SMB Timing Parameters" on page 542.
Signal
GPIO[28:24, 22:0]
GPIO Input [all]
GPIO Output
[22:16, 13:5, 2:0]
GPIO Output
[28:25]
GPIO OD Output
high-to-low data
[15:14, 4:3]
GPIO OD Output
high-to-low data
[24]
GPIO OD Output
low-to-high data
[15:14, 4:3]
GPIO OD Output
low-to-high data
[24]
ating conditions listed in Table 6-3 on page 526 (i.e.,
t
VAL
VAL
min times with load of: 10 pF cap to ground.
max times with load of: 50 pF cap to ground.
Parameter
Async Input
t
t
t
t
t
t
VAL
VAL
VAL
VAL
VAL
VAL
(Continued)
Table 6-21. GPIO Signaling
Min
NA
NA
NA
2
4
2
4
548
Max
NA
20
20
25
25
40
40
• GPIO[22:0] signals are referenced to LPC_CLK and
• GPIO signal parameters are defined in Figure 6-2 "AC
V
T
GPIO[28:24] signals are referenced to KHZ32_XCI. Use
low-to-high edge if LPC Clock; use high-to-low edge if
32kHz clock.
Reference Timing and Test Definition" on page 530.
CORE
CASE
Units
ns
ns
ns
ns
ns
ns
ns
= All).
and V
Comment/Condition
No clock reference.
Can be read via programmed I/O.
Can be used as an interrupt or PME.
Note 1 and Note 2.
Note 2, Note 3, and Note 4. (LPC_CLK)
Note 2, Note 3, and Note 4. (KHZ32_XCI)
Note 2, Note 4, and Note 5. (LPC_CLK)
Note 2, Note 4, and Note 5. (KHZ32_XCI)
Note 2, Note 4, and Note 5 (LPC_CLK)
Note 2, Note 4, and Note 5. (KHZ32_XCI)
CORE_VSB
= All; V
IO
and V
IO_VSB
= All;
Revision 0.8