cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 481

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

Revision 0.8
PMC Register Descriptions
5.18.2.2
ACPI I/O Offset
Type
Reset Value
PM1_EN is the Enable register for Timer Carry, Button, and RTC Alarm wakeup events. All bits in this register are cleared
by the Standby state except bits 10 and 8. They maintain their state through Standby. All bits in this register return the value
written when read, except for the Reserved bits.
If enabled, any of the SCIs cause a wakeup event if the system state is Sleep or Standby (except TMR and GBL).
5.18.2.3
ACPI I/O Offset
Type
Reset Value
PM1_CNT is the Control register for global and the Sleep state settings.
15
15
15:11
Bit
7:6
4:1
10
RSVD
9
8
5
0
14
14
PM Enable 1 (PM1_EN)
PM Control 1 (PM1_CNT)
Name
RSVD
RTC_EN
SLPBTN_EN
PWRBTN_EN
RSVD
GLB_EN
RSVD
TMR_EN
SLP_EN
RSVD
13
13
02h
R/W
0100h
08h
R/W
0000h
12
12
SLP_TYPx
11
11
Description
Reserved. By convention write 0, but other values are “don’t care”. Reads return 0
value.
Real-Time Clock SCI Enable. Enables generating an SCI when RTC_FLAG (ACPI I/O
Offset 00h[10]) gets set. Also enables wakeup from this event. 0: Disable; 1: Enable.
Sleep Button SCI Enable. Enables generating an SCI when SLPBTN_FLAG (ACPI
I/O Offset 00h[9]) gets set. Also enables wakeup from this event. 0: Disable; 1: Enable.
Power Button SCI Enable. Enables generating an SCI when PWRBTN_FLAG (ACPI
I/O Offset 00h[8]) gets set. Also enables wakeup from this event. 0: Disable;
1: Enable (Default).
Reserved. By convention write 0, but other values are “don’t care”. Reads return 0
value.
Global Enable. Enables generating an SCI when GLB_FLAG (ACPI I/O Offset 00h[5])
gets set. There is no wakeup concept for this event. 0: Disable; 1: Enable.
Reserved. By convention write 0, but other values are “don’t care”. Reads return 0
value.
Timer SCI Enable. Enables generating an SCI when TMR_FLAG (ACPI I/O Offset
00h[0]) gets set. There is no wakeup concept for this event 0: Disable; 1: Enable.
RTC_
EN
10
(Continued)
10
SLPBTN
_EN
PM1_EN Bit Descriptions
IGNORE
PM1_CNT Register Map
9
PM1_EN Register Map
9
PWRBTN
_EN
8
8
481
7
7
RSVD
6
6
RSVD
GLB_
EN
5
5
4
4
3
3
RSVD
GBL_
RLS
2
2
BM_
RLD
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1
1
TMR_
SCI_
EN
EN
0
0