cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 250

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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ATAC Register Descriptions
5.4.1.3
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 1. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 3.8.3 "MSR Address 2: SMI Control" on page 67 for
further details.)
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:34
31:2
Bit
33
32
1
0
GeodeLink Device SMI MSR (ATAC_GLD_MSR_SMI)
Name
RSVD
IDE_CH0_IRQ_
ASMI_FLAG
IDE_PIO_SSMI
FLAG
RSVD
IDE_CH0_IRQ_
ASMI_EN
IDE_PIO_SSMI
EN
51300002h
R/W
00000000_00000000h
Description
Reserved. Read returns 0.
IDE Channel 0 IRQ ASMI Flag. If high, records that an ASMI was generated due to an
IRQ event. Write 1 to clear; writing 0 has no effect. IDE_CH0_IRQ_ASMI_EN (bit 1)
must be set to enable this event and set flag.
IDE Programmable I/O SSMI Flag. If high, records that an SSMI was generated due to
a PIO transaction occurring during a DMA command. Write 1 to clear; writing 0 has no
effect. IDE_PIO_SMI_EN (bit 0) must be set to enable this event and set flag.
Reserved. Read returns 0.
IDE Channel 0 IRQ ASMI Mask. Write 1 to enable IDE_CH0_IRQ_ASMI_FLAG (bit
33) and to allow the event to generate an ASMI.
IDE Programmable I/O SSMI Mask. Write 1 to enable IDE_PIO_SSMI_FLAG (bit 32)
and to allow the event to generate an SSMI.
ATAC_GLD_MSR_SMI Bit Descriptions
ATAC_GLD_MSR_SMI Register Map
(Continued)
RSVD
RSVD
250
9
8
7
6
5
4
3
2
Revision 0.8
1
0