lpc4310 NXP Semiconductors, lpc4310 Datasheet - Page 30

• Manufacturer Part Number: lpc4310
• Description: Lpc4350/30/20/10 32-bit Arm Cortex-m4/m0 Mcu; Up To 264 Kb Sram; Ethernet; Two High-speed Usbs; Advanced Configurable Peripherals
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC4350_30_20_10
Objective data sheet
Fig 3.
System
AHB MULTILAYER MATRIX
bus
= master-slave connection
CORTEX-M4
TEST/DEBUG
INTERFACE
code
AHB multilayer matrix master and slave connections
bus
ARM
I-
code
7.6.1 Features
bus
D-
7.5 AHB multilayer matrix
7.6 Nested Vectored Interrupt Controller (NVIC)
CORTEX-M0
TEST/DEBUG
INTERFACE
The NVIC is an integral part of the Cortex-M4. The tight coupling to the CPU allows for low
interrupt latency and efficient processing of late arriving interrupts.
The ARM Cortex-M0 co-processor has its own NVIC with 32 vectored interrupts. Most
peripheral interrupts are shared between the Cortex-M0 and Cortex-M4 NVICs.
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•
•
•
•
ARM
Controls system exceptions and peripheral interrupts.
In the LPC4350/30/20/10, the Cortex-M4 NVIC supports up to 53 vectored interrupts.
32 programmable interrupt priority levels with hardware priority level masking.
Relocatable vector table.
Non-Maskable Interrupt (NMI).
0
DMA
All information provided in this document is subject to legal disclaimers.
1
ETHERNET
Rev. 1 — 29 October 2010
HIGH-SPEED PHY
USB0
USB1
32-bit ARM Cortex-M4/M0 microcontroller
LPC4350/30/20/10
LCD
SDIO
masters
128 kB LOCAL SRAM
AHB PERIPHERALS
72 kB LOCAL SRAM
32 kB AHB SRAM
PERIPHERALS
CONTROLLER
© NXP B.V. 2010. All rights reserved.
16 kB + 16 kB
INTERFACES
EXTERNAL
32 kB ROM
AHB SRAM
REGISTER
APB, RTC
MEMORY
DOMAIN
slaves
002aaf873
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