lpc4310 NXP Semiconductors, lpc4310 Datasheet - Page 31
lpc4310
Manufacturer Part Number
lpc4310
Description
Lpc4350/30/20/10 32-bit Arm Cortex-m4/m0 Mcu; Up To 264 Kb Sram; Ethernet; Two High-speed Usbs; Advanced Configurable Peripherals
Manufacturer
NXP Semiconductors
Datasheet
1.LPC4310.pdf
(85 pages)
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LPC4350_30_20_10
Objective data sheet
7.6.2 Interrupt sources
7.7 On-chip static RAM
7.8 Memory mapping
Each peripheral device has one interrupt line connected to the NVIC but may have several
interrupt flags. Individual interrupt flags may also represent more than one interrupt
source.
The LPC4350/30/20/10 support up to 200 kB local SRAM and an additional 64 kB AHB
SRAM with separate bus master access for higher throughput and individual power
control for low power operation.
The memory map shown in
Cortex-M0 processors and all SRAM is shared between both processors. Each processor
uses its own ARM private bus memory map for the NVIC and other system functions.
•
Software interrupt generation.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 29 October 2010
Figure 4
and
Figure 5
32-bit ARM Cortex-M4/M0 microcontroller
is global to both the Cortex-M4 and the
LPC4350/30/20/10
© NXP B.V. 2010. All rights reserved.
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