lpc4310 NXP Semiconductors, lpc4310 Datasheet - Page 47

• Manufacturer Part Number: lpc4310
• Description: Lpc4350/30/20/10 32-bit Arm Cortex-m4/m0 Mcu; Up To 264 Kb Sram; Ethernet; Two High-speed Usbs; Advanced Configurable Peripherals
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC4350_30_20_10
Objective data sheet
7.16.2 Alarm timer
7.17.1 Configuration registers (CREG)
7.17.2 System Control Unit (SCU)
7.17.3 Clock Generation Unit (CGU)
7.17 System control
The alarm timer is a 16-bit timer and counts down at 1 kHz from a preset value generating
alarms in intervals of up to 1 min. The counter triggers a status bit when it reaches 0x00
and asserts an interrupt if enabled.
The alarm timer is part of the RTC power domain and can be battery powered.
The following settings are controlled in the configuration register block:
In addition, the CREG block contains the part identification and part configuration
information.
The system control unit determines the function and electrical mode of the digital pins. By
default function 0 is selected for all pins with pull-up enabled.
Analog I/Os for the ADCs and the DAC as well as most USB functions reside on separate
pins and are not controlled through the SCU.
The Clock Generator Unit (CGU) generates 21 outputs called base clocks. The CGU
outputs are unrelated in frequency and phase and can have different clock sources within
the CGU. One CGU output is routed to the CLKOUT pins.
Within each clock area there may be multiple branch clocks, which offers very flexible
control for power-management purposes. All branch clocks are outputs of one of two
Clock Control Units (CCUs) and can be controlled independently. Branch clocks derived
from the same base clock are synchronous in frequency and phase.
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Dedicated battery power supply pin.
RTC power supply is isolated from the rest of the chip.
Calibration counter allows adjustment to better than ±1 sec/day with 1 sec resolution.
Periodic interrupts can be generated from increments of any field of the time registers.
Alarm interrupt can be generated for a specific date/time.
BOD trip settings
Oscillator output
DMA-to-peripheral muxing
Ethernet mode
Memory mapping
Timer/USART inputs
Enabling the USB controllers
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 29 October 2010
32-bit ARM Cortex-M4/M0 microcontroller
LPC4350/30/20/10
© NXP B.V. 2010. All rights reserved.
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