lpc4310 NXP Semiconductors, lpc4310 Datasheet - Page 66

• Manufacturer Part Number: lpc4310
• Description: Lpc4350/30/20/10 32-bit Arm Cortex-m4/m0 Mcu; Up To 264 Kb Sram; Ethernet; Two High-speed Usbs; Advanced Configurable Peripherals
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 12.
[1]
[2]
[3]
[4]
LPC4350_30_20_10
Objective data sheet
Symbol
T
T
SSP master
t
t
t
t
SSP slave
t
t
t
t
DS
DH
v(Q)
h(Q)
DS
DH
v(Q)
h(Q)
cy(PCLK)
cy(clk)
T
main clock frequency f
register), and the SSP CPSDVSR parameter (specified in the SSP clock prescale register).
T
T
T
cy(clk)
amb
cy(clk)
amb
= −40 °C to 85 °C; V
= 25 °C; V
= (SSPCLKDIV × (1 + SCR) × CPSDVSR) / f
= 12 × T
Dynamic characteristics: SSP pins in SPI mode
Parameter
PCLK cycle time
clock cycle time
data set-up time
data hold time
data output valid time
data output hold time
data set-up time
data hold time
data output valid time
data output hold time
11.5 SSP interface
cy(PCLK)
DD(REG)(3V3)
main
.
DD(REG)(3V3)
, the SSP peripheral clock divider (SSPCLKDIV), the SSP SCR parameter (specified in the SSP0CR0
= 3.3 V; V
DD(IO)
= 2.0 V to 3.6 V; V
All information provided in this document is subject to legal disclaimers.
= 3.3 V.
Conditions
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
Rev. 1 — 29 October 2010
main
. The clock cycle time derived from the SPI bit rate T
DD(IO)
= 2.0 V to 3.6 V.
[1]
[2]
[2]
[2]
[2]
[3][4]
[3][4]
[3][4]
[3][4]
Min
<tbd>
<tbd>
<tbd>
-
-
-
<tbd>
<tbd> × T
<tbd>
-
-
32-bit ARM Cortex-M4/M0 microcontroller
cy(PCLK)
LPC4350/30/20/10
+
Max
-
-
T
<tbd>
<tbd>
<tbd>
-
-
<tbd> × T
<tbd>
<tbd> × T
<tbd>
cy(clk)
cy(clk)
cy(PCLK)
cy(PCLK)
© NXP B.V. 2010. All rights reserved.
is a function of the
+
+
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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